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This ZIP File is associated with Rev 2 of the Application Note


   External Port DMA Modes of Operation for SHARC Processors (EE-84)  


that can be found at http://www.analog.com/ee-notes.


Date Created:	Feb 28th, 2007


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The archive provides several code examples, one per SHARC processor series:

Example 1 in directory Mastermode contains the project files which correspond to 
the master mode DMA operation for the respective processors. The example code provided
demonstrates the master mode DMA operation between the internal memory and the external
SDRAM connected on the EZ-KIT Lite boards.


Example 2 in directory Slavemode contains the project files which correspond to 
the slave mode DMA operation for the ADSP-21161N processors. The example code provided
demonstrates the slave mode DMA operation between two ADSP-21161N processors connected on
the external bus. One processor acts as a master and the other one acts as slave.

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All code examples have been written and tested with

	VisualDSP++ 4.5 November Update

	ADSP-21065L revision 0.3

	EZ-KIT Lite revision 2.03
	
	ADSP-21161 revision 1.2
	
	EZ-KIT Lite revision 2.3
	
	ADSP-21369 revision 0.1
	
	EZ-KIT Lite revision 1.2
	
	ADSP-21375 revision 0.0
	
	EZ-KIT Lite revision 1.0


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