The Project is the benchmark program created to analyze the DMA Traffic control register as
discussed in the EE-324 application note.

This VisualDSP++ Project Group contains two projects - CoreA.dpj and CoreB_idle.dpj

CoreA.dpj contains the following files:

"DMAInit.c",
"InitInterrupts.c",
"InitPLL.c",
"main.c",
"MEMDMAInit.c",
"PPI_Init",
"Reset_ADV7179",
"Reset_ADV7183.c",
"SDRAM_Init.c",
"system_isrs.c",
"video_out.c",
"a1836.h",
"main.h",
"system.h",
"PPIBench.ldf",
"PPIBench_basiccrt.s",
"PPIBench_heaptab.s"

CoreB_idle.dpj contains the following files:

"Initpll.c",
"main.c",
"CoreB_idle.ldf",
"main.h", //common files
"system.h",//common files

The values for the DMA traffic control can be set using the following two macros as defined in system.h file.
"SET_TRAFFIC_CONTROL_0x7ff" and
"SET_TRAFFIC_CONTROL_0x777"

The Core and System Clock frequency can also be adjusted using the macros as defined
in system.h file

The example test case shows that the DMA trasffic control can help for uniform sharing of resources and
eliminate underflow/overflow errors on peripherals but the values should however be chosen carefully depending
on the number of peripherals on a DMA controller. Please refer to section 
"System Bandwidth Analysis -> Evaluating the Traffic Control Register" in the EE-324 application note for 
more information.
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Requires ADSP-BF561 silicon revision of 0.5 or higher
and VisualDSP++ 4.5.
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CONTENTS

I.	 FUNCTIONAL DESCRIPTION
II.	 OPERATION DESCRIPTION
III. PROJECT STRUCTURE


I.    FUNCTIONAL DESCRIPTION

	Core A is the benchmark program. It sets up the Clock frequencies, SDRAM controller, the Video Encoder and Decoder, and PPI's, MDMA's etc.
	Core B is just created to set up the clock frequencies. It is necessary to have core B in idle to change clock frequencies.
	
II.  OPERATION DESCRIPTION

	- Open the "Benchmark_Traffic_control.dpg" project group in the VisualDSP Integrated Development
	  Environment (IDDE). Follow instructions in section III.
	
	- Connect a video NTSC/PAL CVBS source to the bottom right connector of J6 (video in/out jack) (This is just to use PPI0)
	
	- Dipswitch SW5: set #1 to "off", all others to on
	- Dipswitch SW2: set #2,3,5 to "off", #1,4,6 to on
	- Dipswitch SW3: set #1,4 to "off", #2,3 to on
		
    - The main header file "system.h" contains #define statements for the DMA traffic control setting.
      Follow the comments in System.h file and select a particular test case.
  
	- Under the "Project" tab, select "Build Project" (program is then loaded automatically into DSP).

	- Run the executables by pressing "multiprocessor run" (CTRL-F5) on the toolbar. DO NOT use the 
	  single core (F5) button. 
	  
	
		
III. PROJECT STRUCTURE

	This is a dual core project. 
	it has 2 sub-projects 		- containing the source code -
			".\coreA\PPIBench.dpj"					( code exclusive to core A, in L1 memory )
			".\coreB\CoreB_idle.dpj"					( code exclusive to core B, in L1 memory )
				
	Follow this procedure to open and compile the project:
	- open the project group (File -> Open -> Project Group)
	- right click on the main project and re-build the project.
	
	