extern void Delay_Before_Return_func();

void FLASH_BLOCK_Erase_Command(int rw0, int rw1, int rw2);

extern void Delay_Before_Return_func();

extern int* FlshBankCMDptr;
extern int* FlshBankALEptr;
extern int* FlshBankRDptr;

int Erase_Status = 0;
//Block Erase Command
void FLASH_BLOCK_Erase_Command(int rwf0, int rwf1, int rwf2)

{	
	asm("#include <def21161.h>");
	asm("bit clr FLAGS FLG3;");  //enable chip - FLASH CS# asserted here
	
	//Drive CLE "HI" for the command phase "A0" -> "HI" and "A1" -> "LO"
	//Give command "0x60"
	*FlshBankCMDptr = 0x60;
	
	//Drive ALE "HI" - address phase "A1" -> "HI" and "A0" -> "LO"
	/* For block erase, only ROW address is needed since the entire block is erased
	   with this command. Page address and element address is not used only block address
	   needs to be written.
	*/  
	*FlshBankALEptr = rwf0; //"0"th row 
	*FlshBankALEptr = rwf1; //"1st" row
	*FlshBankALEptr = rwf2; //"2nd" row
	
	
	//Drive CLE "HI" for the command phase "A0" -> "HI" and "A1" -> "LO"
	//Give command "0xD0"
	*FlshBankCMDptr = 0xD0;
	
	asm("idle;"); //wait for interrupt
		//Following section checks for erase status
		//--------------------------------------------------------------------
		//Drive CLE "HI" for the command phase "A0" -> "HI" and "A1" -> "LO"
		//Give command "0x70"
		*FlshBankCMDptr = 0x70;
		//perform read from memory "A0" and "A1" should be "LO"
		Erase_Status = *FlshBankRDptr;//I/O0 should be 0 for successful erase
									  //I/O0 is "1" for erase error
		//--------------------------------------------------------------------
	
	asm("bit set FLAGS FLG3;");//Disable chip - FLASH CS# de-asserted
	
	Delay_Before_Return_func();
	return;
}
