/******************************************************************************/
//
// Name: 	NAND FLASH interface with ADSP-21161
//
/******************************************************************************

(C) Copyright 2005 - Analog Devices, Inc.  All rights reserved.

File Name:		BlockErase.asm

Date Modified:	20/06/05 - AV	-	Rev 1.0

Software:       VisualDSP++4.0

Purpose: Demostrate NAND FLASH Interface		
				
*******************************************************************************/

#include <def21161.h>

.global FLASH_BLOCK_Erase_Command;

.extern CLE_delay_func;
.extern ALE_delay_func;
.extern POLL_delay_func;
.extern POLL_delayErase_func;
.extern AFTER_RD_WR_delay_func;
.extern Delay_Before_Return_func;

.section/pm seg_dmda;
	.var Erase_Status = 0;
	
.section/pm seg_pmco;


//Block Erase Command
FLASH_BLOCK_Erase_Command:
	bit clr FLAGS FLG3;  //enable chip - FLASH CS# asserted here
	bit set FLAGS FLG1;  //Drive CLE "HI" for the command phase
	
	//Give command "0x60"
	r0 = 0x60;
	dm(0x00200000) = r0; //write to bank 3 address space - FLASH is interfaced to bank3	
	
	CALL CLE_delay_func;//call CLE delay
	//De-assert CLE
	bit clr FLAGS FLG1;
	
	//Drive ALE "HI" - address phase
	bit set FLAGS FLG0;
	/* For block erase, only ROW address is needed since the entire block is erased
	   with this command. Page address and element address is not used only block address
	   needs to be written.
	*/  
	dm(0x00200000) = r13; //"0"th row 
	dm(0x00200000) = r14; //"1st" row
	dm(0x00200000) = r15; //"2nd" row
	
	
	//Drive ALE "LO"
	CALL ALE_delay_func;//call ALE delay
	bit clr FLAGS FLG0;
	
	bit set FLAGS FLG1;  //Drive CLE "HI" for the command phase
	
	//Give command "0xD0"
	r0 = 0xD0;
	dm(0x00200000) = r0; //write to bank 3 address space - FLASH is interfaced to bank3	
	
	CALL CLE_delay_func;//call CLE delay
	//De-assert CLE
	bit clr FLAGS FLG1;
	
	CALL POLL_delayErase_func;
		//Following section checks for erase status
		//--------------------------------------------------------------------
		bit set FLAGS FLG1;  //Drive CLE "HI" for the command phase
	
		//Give command "0x70"
		r0 = 0x70;
		dm(0x00200000) = r0; //write to bank 3 address space - FLASH is interfaced to bank3	
	
		CALL CLE_delay_func;//call CLE delay
		//De-assert CLE
		bit clr FLAGS FLG1;
		
		//perform read from memory
		r1 = dm(0x00200000); //I/O0 should be 0 for successful erase
							 //I/O0 is "1" for erase error
		dm(Erase_Status) = r1;
		//--------------------------------------------------------------------
	
	bit set FLAGS FLG3;//Disable chip - FLASH CS# de-asserted
	
	CALL Delay_Before_Return_func;
	
	RTS;	
FLASH_BLOCK_Erase_Command.end:
