****************************************************************************
Interfacing Gated Clocks to ADSP-21065L SHARC Processors (EE-244)

Analog Devices, Inc.
DSP Division
Three Technology Way
P.O. Box 9106
Norwood, MA 02062

Date Created:	27/9/2004

-----------------------------------------------------------------------------
This has been tested on the ADSP-21065L EZ-KIT board. ADSP-21161N EZ KIT has been used as a source
for gated clock for ADSP-21065L serial port.

This application note discusses issues associated with the use of gated serial port
clock with ADSP-21065L. The application note considers SPI as a standard interface with
ADSP-21065L serial port in order to explain in-depth functionality of serial port when 
used with external gated serial port clocks.

The SPI master interface with the ADSP-21065L serial port discussed in this application
note is a generic platform which would definitely benefit system designers to interface
devices like A/D converters that use gated clock and similar timing specifications 
considered in this application note. 

------------------------------------------------------------------------------
This directory contains two more folders that contain the code used for this EE note.

1. "21161_SPI_Core" :
This folder contains code for ADSP-21161N EZ KIT Lite.

2. "SPORT_Gated_with_7676" :
This folder contains code for ADSP-21065L EZ-KIT Lite.Serial port 0 has been used on the 
EZ-KIT.
------------------------------------------------------------------------------

Visual DSP version : VisualDSP++3.5
DSP part number : ADSP-21065L Silicon Rev 0.3

------------------------------------------------------------------------------


