
/////////////////////////////////////////////////////////
//
//  VisualDSP++ 2.0 for Blackfin example
//
//  Initialize the DSP in order to process user code
//  in kernel mode using interrupt priority level 15.
//
//  (c) Analog Devices, 
//
////////////////////////////////////////////////////////


#include "mydef.h"
#include "def21535.h"


.section sec_stack;
.global stack;
.global stack_top;
.var stack[0x200];
stack_top:


.section sec_setup;
.extern  isr_application;
.extern  isr_dma;
.extern  isr_FlagA;
.extern  isr_FlagB;


setup:	R0 = 0 (Z);
		// clear DAG registers
		L0 = R0 ; L1 = R0; L2 = R0; L3 = R0;
		B0 = R0 ; B1 = R0; B2 = R0; B3 = R0;

		// clear loop registers
		LT0 = R0; LB0 = R0; LC0 = R0;
    	LT1 = R0; LB1 = R0; LC1 = R0;

		// clear status
    	ASTAT = R0;    
		
		IMMEDIATE32(SP,stack_top);
		FP = SP;

		// initialize interrupt vectors
		P0.L = 0x2000; P0.H = 0xFFE0;		
		IMMEDIATE32(R0, isr_emulator); 		[ P0 + IVEC0 ] = R0;
		IMMEDIATE32(R0, isr_reset); 		[ P0 + IVEC1 ] = R0;
		IMMEDIATE32(R0, isr_nmi); 			[ P0 + IVEC2 ] = R0;
		IMMEDIATE32(R0, isr_exception);		[ P0 + IVEC3 ] = R0;
		IMMEDIATE32(R0, isr_hardware);		[ P0 + IVEC5 ] = R0;

		IMMEDIATE32(R0, isr_unused);		[ P0 + IVEC6 ] = R0;
		IMMEDIATE32(R0, isr_dma);			[ P0 + IVEC7 ] = R0;
		IMMEDIATE32(R0, isr_FlagB);			[ P0 + IVEC8 ] = R0;
		IMMEDIATE32(R0, isr_FlagA);			[ P0 + IVEC9 ] = R0;
		IMMEDIATE32(R0, isr_unused);		[ P0 + IVEC10 ] = R0;
											[ P0 + IVEC11 ] = R0;
											[ P0 + IVEC12 ] = R0;
											[ P0 + IVEC13 ] = R0;
											[ P0 + IVEC14 ] = R0;

		IMMEDIATE32(R0, isr_application); 	[ P0 + IVEC15 ] = R0;


		// mask all interrupts except irq 7,8,9 and 15
		P0.L = 0x2100; P0.H = 0xFFE0;
	    R0 = 0;				[ P0 + EVT_OWR ] = R0;
		R0 = 0x8380 (z);	[ P0 + EVT_IMASK ] = R0;


		p1.H = hi(SIC_IAR2); p1.L = lo(SIC_IAR2); 		// set P1 to Interrupt Controller Register
		r0.H = 0x7777;			//set all other interrupts to IVG14

		//map memDMA to IVG7 (Priority 0), FlagA to IVG8, FlagB to IVG9
		r0.L = 0x0127;			
		[p1] = r0;
		r0.L = 0x7777;			//set all other interrupts to IVG14
		p1.L = lo(SIC_IAR0); 
		[p1] = r0;
		p1.L = lo(SIC_IAR1); 
		[p1] = r0;

		// enable peripheral IRQ sources
		p1.H = hi(SIC_IMASK); 
		p1.L = lo(SIC_IMASK); 		
		r0 = [p1];	
		bitclr(r0,19);			// unmask mem DMA		
		bitclr(r0,18);			// unmask PF Interrupt B		
		bitclr(r0,17);			// unmask PF Interrupt A		
		[p1] = r0; 	// clear bits to unmask in rev 0.2


		RAISE 15; 	// won't be served until in user mode

		IMMEDIATE32(R0, user_just_waits);	RETI = R0;
		nop; nop; nop; nop;
		rti;

		// once in user mode just wait that irq 15 will be serviced
		// then application continues at label isr_application
user_just_waits:

		jump user_just_waits;

isr_emulator:	
		rte;

isr_reset:
		rti;

isr_nmi:
		jump isr_nmi;
		rtn;

isr_exception:
		jump isr_exception;
		rtx;

isr_hardware:
		jump isr_hardware;
		rti;

isr_unused:
		jump isr_unused;
		rti;

