DSP和嵌入式处理器: Analog Dialogue: Analog Devices


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DSP和嵌入式处理器

应用笔记

串行下载协议支持现场升级

AN-1074：了解串行下载协议

这篇16页的应用笔记描述用于ADuC8xx系列MicroConverter®产品的串行下载协议。该系列产品能够将代码在线下载至片内Flash/EE程序存储器。下载通过UART端口进行，称为串行下载。开发人员可以利用这一功能对直接焊接到目标系统上的器件进行重新编程，而无需使用外部器件编程器以及从电路板上拆除器件。串行下载还支持现场升级，制造商无需取出器件就能升级系统固件。任何MicroConverter器件都可以在上电时或者通过施加外部复位信号而配置为串行下载模式。本应用笔记详细说明了串行下载协议，以便最终用户能够充分了解并在目标系统中实现该协议。

Circuits from the Lab

新产品简介

June 2011

SHARC Processors

The ADSP-21478 and ADSP-21479 fourth-generation low-power SHARC® processors offer increased performance, hardware-based filter accelerators, audio- and application-focused peripherals, and up to 5 Mbits of SRAM, making them ideal for professional and automotive audio applications. Their single-instruction, multiple-data (SIMD) core supports 32-bit fixed-point and 32-/40-bit floating-point arithmetic formats—performing up to 1800 MFLOPS with a 300-MHz clock. The variable instruction-set architecture (VISA) allows code to be decreased by 20% to 30%, increasing the available memory. Application-specific peripherals simplify hardware design, minimize design risks, and reduce time to market. The software-programmable signal routing unit (SRU) enables flexible routing of digital applications interface (DAI) blocks. Peripherals connected through the SRU include serial ports, SPI ports, S/PDIF transceiver, and an 8-channel asynchronous sample-rate-converter block. The digital peripheral interface (DPI) includes a UART and a two-wire interface. FIR, IIR, and FFT accelerators increase the total system performance. The DMA controller can transfer data from the serial ports to external 16-bit SDR SDRAMs through a glueless interface. All SHARC processors are pin- and code compatible. Specified from 0°C to +70°C (K-grade) or –40°C to +85°C (B-grade), the ADSP-21478/79 are available in 100-lead LQFP and 196-ball CSP-BGA packages and priced from $7.99 in 1000s.

Blackfin Embedded Processor

The ADSP-BF592 Blackfin processors—optimized for cost-sensitive industrial, automotive, and medical applications—combine the multimedia signal-processing power of a single-instruction, multiple-data (SIMD) DSP with the control capabilities of a RISC microcontroller. With two 16-bit MACs, two 40-bit ALUs, four 8-bit video ALUs, and 132K bytes of core-addressable memory, they operate at up to 400 MHz. 64K bytes of factory-programmed instruction ROM contains VDK RTOS and C-runtime libraries. Peripherals include four timer/counters (three with PWM); two full-duplex synchronous serial ports (SPORTs) that support eight channels of I2S stereo audio; two SPI ports; one UART with IrDA support; a parallel peripheral interface (PPI) that supports ITU-R 656 video formats; a two-wire interface (TWI) controller; nine peripheral DMAs; two memory-to-memory DMA channels, an event handler, 32 GPIOs, a JTAG debugging interface, and a PLL. Specified from 0°C to +70°C (K-grade) or –40°C to +85°C (B-grade), the ADSP-BF592 is available in a 64-lead LFCSP package and priced from $3.56 in 1000s.

技术文章

Ben Wang, 利用SigmaDSP将汽车音频系统的噪声和功耗降至最低, Analog Dialogue, 3/1/2011

Miguel Chavez, 扬声器系统的自动均衡、分频和对齐, ALMA International, 1/5/2011

网络研讨会和教程

应对电机控制的嵌入式设计挑战 - 本研讨会于3月16日首播，主要介绍新的设计方法和设计流程以及一个完整的开放式系统设计，以便实现各种利用低成本处理器来完成数学计算密集型应用任务的终端解决方案，这在几年前是无法做到的。

现场可编程门阵列(FPGA)的供电：了解基础知识 -- 本研讨会讨论现场可编程门阵列(FPGA)的特殊电源要求，以及用来确保无故障工作的合适电源产品。其中特别介绍一种针对高性能FPGA的供电要求而优化的多功能DC-DC调节器。