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Noise-Reduction Network for Adjustable-Output Low-Dropout Regulators
By Glenn Morita
This article describes how a simple RC network can reduce the output noise of an adjustable-output, low-dropout regulator. Experimental data demonstrates the efficacy of this simple technique. Although noise reduction is its primary focus, the RC network also improves power-supply rejection and load- transient response.
Figure 1 shows a simplified block diagram of a typical adjustable-output LDO. The output voltage, VOUT, is the product of the reference voltage and the dc closed-loop gain of the error amplifier: VOUT = VR × (1 + R1/R2), where (1 + R1/R2) is the dc closed-loop gain of the error amplifier.
The error-amplifier noise, VN, and reference-voltage noise, VRN, are multiplied by the same factor, resulting in output noise that increases in proportion to the programmed output voltage. This results in a modest increase in the output noise for output voltages less than a factor of two greater than the reference voltage, but even this modest increase may be unacceptable in sensitive applications.
Figure 1. Simplified adjustable LDO block diagram shows internal noise sources.
Reducing LDO Noise
Reducing the noise gain of the error amplifier can produce an LDO where the output noise does not increase dramatically with output voltage. Unfortunately, this is not possible for fixed-output LDOs because the feedback node is not accessible. Fortunately, this node is readily accessible in adjustable-output LDOs.
Figure 2 shows an adjustable-output LDO where R1 and R2 set the output voltage. The network formed by R3 and C1 reduces the ac gain of the error amplifier. To ensure stability with LDOs that have low-phase margin or are not unity-gain stable, choose R3 to set the amplifier’s high-frequency gain to approximately 1.1. To reduce noise in the 1/f region, choose C1 to set the low-frequency zero to less than 10 Hz.
Figure 2. Simple RC network reduces noise gain of an adjustable-output LDO.
Figure 3 compares the ac closed-loop gain with a properly designed noise-reduction network to the open-loop gain and unmodified closed-loop gain. With the noise-reduction network, the ac gain is close to unity for much of the bandwidth, so the reference noise and error amplifier noise are amplified to a lesser degree.
Figure 3. LDO loop gains vs. frequency with noise reduction network.
Figure 4 shows the effect of the noise-reduction network on the noise spectral density of the ADP125 LDO. For comparison, the plot shows the noise spectral density at 4 V with and without the noise-reduction network, as well as the noise spectral density at unity gain.
Note the significant improvement in noise performance between 20 Hz and 2 kHz. Above the zero created by R1 and C1, the noise characteristic with the noise-reduction network is nearly the same as it is at unity gain. Above 20 kHz, the noise spectral density plots converge because the closed-loop gain of the error amplifier meets the open-loop gain, and no further reduction in noise gain is possible.
Figure 4. Noise spectral density of the ADP125 adjustable-output LDO.
Power Supply Rejection
For most analog circuits, PSR applies to the pins that supply power to the inner workings of the circuit. With LDOs, however, the input pin supplies power to the internal circuitry as well as load current to the regulated output.
Figure 5 shows the effect of the noise-reduction network on the PSRR of the ADP7102 adjustable-output LDO. With a 9-V output, R1 = 64 kΩ, R2 = 10 kΩ, R3 = 1 kΩ, and C1 = 1 μF. The zero created by R1 and C1 at about 2.5 Hz is evident by the improvement in PSRR above 10 Hz. The overall PSRR increases by about 17 dB from 100 Hz to 1 kHz. The improvement decreases until about 20 kHz where the open-loop gain and closed-loop gain converge.
Figure 5. PSRR of the ADP7102/ADP7104 adjustable-output
Figure 6. Transient-load response of the ADP125 adjustable-output LDO
Effect on Start-up Time
Figure 7. Start-up time of the ADP125 adjustable-output LDO
This technique will work with LDOs with architectures similar to that shown in Figure 2, where both the reference-voltage noise and the error-amplifier noise are amplified by the dc closed-loop gain, such that the output noise scales with the output voltage. LDOs such as the ADP125, ADP171, ADP1741, ADP1753, ADP1755, ADP7102, ADP7104, and ADP7105 all share this general architecture and will benefit greatly from the use of a noise-reduction network.
Newer, ultralow-noise LDOs such as the ADM7151 will not benefit from the noise-reduction network because the architecture uses the LDO error amplifier in unity gain, so the reference voltage is equal to the output voltage. In addition, the internal reference filter has a pole below 1 Hz, heavily filtering the reference voltage and virtually eliminating any reference noise contribution.
Morita, Glenn. AN-1120 Application Note. Noise Sources in Low- Dropout (LDO) Regulators. Analog Devices, Inc., 2011.
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