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コンテンツの種類 |
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AD9857: CMOS 200 MSPS 14-Bit Quadrature Digital Upconverter Data Sheet (Rev C, 05/2004) (pdf, 1065 kB)
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データシート |
PDF
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AN-0996: The Advantages of Using a Quadrature Digital Upconverter (QDUC) in Point-to-Point Microwave Transmit Systems
(pdf, 219 kB)
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アプリケーション・ノート |
PDF
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AN-924: Digital Quadrature Modulator Gain
(pdf, 105 kB)
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アプリケーション・ノート |
PDF
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AN-922: Digital Pulse-Shaping Filter Basics
(pdf, 1582 kB)
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アプリケーション・ノート |
PDF
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AN-851: A WiMax Double Downconversion IF Sampling Receiver Design
(pdf, 262 kB)
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アプリケーション・ノート |
PDF
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AN-837: DAC再生フィルタ性能とDDS採用時のクロック・ジッタ性能の関係
(pdf, 528 kB)
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アプリケーション・ノート |
PDF
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AN-837: DDS-Based Clock Jitter Performance vs. DAC Reconstruction Filter Performance
(pdf, 313 kB)
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アプリケーション・ノート |
PDF
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AN-823: Direct Digital Synthesizers in Clocking Applications Time
(pdf, 115 kB)
Jitter in Direct Digital Synthesizer-Based Clocking Systems
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アプリケーション・ノート |
PDF
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AN-237: Choosing DACs for Direct Digital Synthesis
(pdf, 1156 kB)
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アプリケーション・ノート |
PDF
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A Technical Tutorial on Digital Signal Synthesis
(pdf, 901 kB)
Copyright © 1999 Analog Devices, Inc.
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設計ハンドブック |
PDF
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Fundamentals of Frequency Synthesis, Part 2: Direct Digital Synthesis (DDS)
This month we conclude our two-part series on frequency synthesis, with an introduction to Direct Digital Synthesis. We will give a basic review of how a direct digital synthesis system works, touching on the inner workings of the DDS engine at a relatively high level. We will also discuss the tradeoffs between PLL and DDS technology as a base choice for frequency synthesis needs.
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Webcasts |
WEBCAST
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Performance Clocks: Demystifying Jitter
Join us as we delve into the realm of sub-picosecond jitter clocks. The relationship between jitter and phase noise will be explored in detail and methods for measuring sub-picosecond jitter and ultra low phase noise will be presented and discussed.
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Webcasts |
WEBCAST
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Speedy A/Ds Demand Stable Clocks
by Jeff Keip, Analog Devices, Inc. (EE Times, 3/18/04)
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技術関連記事 |
HTML
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Improved DDS Devices Enable Advanced Comm Systems
by Valoree Young, Analog Devices
(Electronic Products, September 2006)
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技術関連記事 |
HTML
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Introducing Digital Up/Down Converters: VersaCOMM™ Reconfigurable Digital Converters
(pdf, 63 kB)
Revolutionize your radio architectures
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技術関連記事 |
PDF
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Digital Up/Down Converters: VersaCOMM™ White Paper
(pdf, 97 kB)
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技術関連記事 |
PDF
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Basics of Designing a Digital Radio Receiver (Radio 101)
(pdf, 77 kB)
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技術関連記事 |
PDF
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The Year of the Waveform Generator
(Test & Measurement World, 12/1/2005)
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技術関連記事 |
HTML
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DDS Simplifies Polar Modulation
By Ken Gentile, Analog Devices ... Basic modulation mathematics and DDS (direct digital synthesis) provide designers with an all-digital technique for generating polar-encoded carrier signals. (EDN, 8/5/2004)
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技術関連記事 |
HTML
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Digital Upconverter IC Tames Complex Modulation
(pdf, 837 kB)
by Ken Gentile, Analog Devices, Inc.
... An improved 14-bit architecture, simplified synchronization, and enhanced power-saving circuitry are a few of the features of this quadrature digital upconverter.
(Reprinted with permission of Microwaves & RF where it first appeared in the August 2000 issue)
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技術関連記事 |
PDF
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Ask The Application Engineer—33: All About Direct Digital Synthesis
(Analog Dialogue, Vol. 38, August 2004)
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技術情報誌 Analog Dialogue |
HTML
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Free Direct Digital Synthesis IC Evaluation Tool
(Control Engineering, 9/14/2006)
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関連記事 |
HTML
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On-Line Evaluation Tool Simplifies Implementing DDS Semiconductors
(eeProductCenter, 8/16/2006)
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関連記事 |
HTML
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RFシステムの開発の簡素化と設計期間を短縮するRF設計ツールの新バージョンを発表 (02 Jun 2011)
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プレス・リリース |
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クロックが変わった場合の位相シフトの分解能
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FAQ（よくある質問） & RAQ（珍問／難問集） |
HTML
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外形寸法図のBSCとは？
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FAQ（よくある質問） & RAQ（珍問／難問集） |
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Pwr Dissとは？
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FAQ（よくある質問） & RAQ（珍問／難問集） |
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ICの寿命や製品保証の資料は？
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FAQ（よくある質問） & RAQ（珍問／難問集） |
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デシケータ管理条件
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FAQ（よくある質問） & RAQ（珍問／難問集） |
HTML
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Are there any specific recommendations for material in the vias of the circuit board for the thermally enhanced package styles in which some ADI DDS' are available?
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FAQ（よくある質問） & RAQ（珍問／難問集） |
HTML
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I have limited experience working with thermally enhanced packages. Where can I get information concerning the proper techniques for soldering and assembly?
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FAQ（よくある質問） & RAQ（珍問／難問集） |
HTML
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I need to operate my DDS part above the rated temperature range. Can you give me any reliability data?
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FAQ（よくある質問） & RAQ（珍問／難問集） |
HTML
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Are any of your DDS products space qualified?
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FAQ（よくある質問） & RAQ（珍問／難問集） |
HTML
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Why did the model numbers change on the AD9852 and AD9854 products? I thought they were available in the ASQ package.
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FAQ（よくある質問） & RAQ（珍問／難問集） |
HTML
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If the port has a differential REF CLK, and I want to use a single-ended clock, what do I do with the other differential input?
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FAQ（よくある質問） & RAQ（珍問／難問集） |
HTML
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If I violate the proper logic level of the REF CLK (that is, underdrive or overdrive it), what can I expect?
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FAQ（よくある質問） & RAQ（珍問／難問集） |
HTML
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What type of signal source is recommended?
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FAQ（よくある質問） & RAQ（珍問／難問集） |
HTML
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Why does spectral performance degrade when using larger values of multiplication on the clock multiplier?
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FAQ（よくある質問） & RAQ（珍問／難問集） |
HTML
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Can the DDS evaluation boards be integrated directly into a system project?
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FAQ（よくある質問） & RAQ（珍問／難問集） |
HTML
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I am having problems getting my evaluation software to see my evaluation board; what should I do to correct the problem?
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FAQ（よくある質問） & RAQ（珍問／難問集） |
HTML
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Is all DDS software supplied by Analog Devices compatible with all WinXX versions?
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FAQ（よくある質問） & RAQ（珍問／難問集） |
HTML
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What is the proper termination for the DAC outputs for the DDS products?
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FAQ（よくある質問） & RAQ（珍問／難問集） |
HTML
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Why can't I see a signal at the output of my DDS when it is unterminated? (I'm setting everything correctly, but I'm just probing the output pins of the DDS which have nothing connected to them.)
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FAQ（よくある質問） & RAQ（珍問／難問集） |
HTML
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How can I synchronize multiple DDS parts?
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FAQ（よくある質問） & RAQ（珍問／難問集） |
HTML
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Can I gate the REF CLK on and off?
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FAQ（よくある質問） & RAQ（珍問／難問集） |
HTML
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What kind of problems can I expect from exceeding the maximum clock rate? (power dissipation, spectral problems)
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FAQ（よくある質問） & RAQ（珍問／難問集） |
HTML
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What is the effect of REF CLK jitter on the DDS?
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FAQ（よくある質問） & RAQ（珍問／難問集） |
HTML
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What are the proper logic input levels for the DDS parts?
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FAQ（よくある質問） & RAQ（珍問／難問集） |
HTML
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What are the advantages and disadvantages of serial and parallel mode?
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FAQ（よくある質問） & RAQ（珍問／難問集） |
HTML
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Can I read back data at the same rate that I can write the data to the DDS device?
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FAQ（よくある質問） & RAQ（珍問／難問集） |
HTML
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What logic families can interface with our parts?
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FAQ（よくある質問） & RAQ（珍問／難問集） |
HTML
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What is the maximum speed I can write to the part?
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FAQ（よくある質問） & RAQ（珍問／難問集） |
HTML
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I would like to update the FTW of my DDS, but only a single byte of the FTW needs to change. Can the frequency tuning word of a DDS be partially updated a byte at a time?
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FAQ（よくある質問） & RAQ（珍問／難問集） |
HTML
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What layout recommendations do you have for the power supply pins of the DDS device?
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FAQ（よくある質問） & RAQ（珍問／難問集） |
HTML
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What is the effect of increasing my supply voltage beyond the nominal recommended value?
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FAQ（よくある質問） & RAQ（珍問／難問集） |
HTML
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I have limited power to supply to the part. What can I do to reduce the power consumption of the device and thus ensure that my supply is adequate?
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FAQ（よくある質問） & RAQ（珍問／難問集） |
HTML
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Do you recommend a linear or switching power supply?
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FAQ（よくある質問） & RAQ（珍問／難問集） |
HTML
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Should I separate digital and analog ground planes on my evaluation board?
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FAQ（よくある質問） & RAQ（珍問／難問集） |
HTML
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Can I use the same power supply for AVDD and DVDD?
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FAQ（よくある質問） & RAQ（珍問／難問集） |
HTML
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What is the ratio between the analog and digital currents drawn by the DDS devices?
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FAQ（よくある質問） & RAQ（珍問／難問集） |
HTML
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I'm not using all the blocks of the AD9858. What do I do with the unused inputs of these sections?
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FAQ（よくある質問） & RAQ（珍問／難問集） |
HTML
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What causes a Quadrature Digital Upconverter (AD9856, AD9857) to go into a CIC overflow condition?
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FAQ（よくある質問） & RAQ（珍問／難問集） |
HTML
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How do I use a DDS for a clock driver?
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FAQ（よくある質問） & RAQ（珍問／難問集） |
HTML
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How do I perform amplitude modulation on the output?
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FAQ（よくある質問） & RAQ（珍問／難問集） |
HTML
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How can I control the envelope of the output?
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FAQ（よくある質問） & RAQ（珍問／難問集） |
HTML
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How do I change the phase of my output signal?
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FAQ（よくある質問） & RAQ（珍問／難問集） |
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Are frequency changes of a DDS phase coherent?
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FAQ（よくある質問） & RAQ（珍問／難問集） |
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Does Analog Devices offer a list of manufacturers of oscillators for DDS devices?
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FAQ（よくある質問） & RAQ（珍問／難問集） |
HTML
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Where can I find some good background material on direct digital synthesis?
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FAQ（よくある質問） & RAQ（珍問／難問集） |
HTML
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よくある質問（FAQ）: ダイレクト・デジタル・シンセサイザ（DDS）
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FAQ（よくある質問） & RAQ（珍問／難問集） |
HTML
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Rarely Asked Questions...アナログ・デバイセズに寄せられた珍問／難問集
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RAQ（珍問／難問集） |
HTML
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半導体用語集
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用語集 |
HTML |
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