製品概要

機能と利点

  • 333MHz /1.8 GFLOPs SIMD SHARC core supporting IEEE 32-bit floating-point, 40-bit floating-point and 32-bit fixed-point data types
  • 25 zero-overhead DMA channels
  • Digital Audio Interface (DAI) enabling user-definable access to peripherals including an S/PDIF Tx/Rx, 8-channel asynchronous sample rate converter, and Data Transmission Content Protection hardware accelerator
  • 6 serial ports (SPORTs) supporting I2S, left-justified sample pair, and TDM modes
  • 2 SPI-compatible ports supporting master and slave modes
  • 16 Pulse Width Modulation (PWM) channels
  • 3 full-featured timers
  • 136-ball MBGA and 144-Ld LQFP E-Pad
    package options
  • Commercial and Industrial temperature ranges

製品概要

The third generation of SHARC® Processors, which includes the ADSP-21261, ADSP-21262, ADSP-21266, ADSP-21267, ADSP-21363, ADSP-21364, ADSP-21365, and ADSP-21366, offers increased performance, audio and application-focused peripherals, and memory configurations capable of supporting surround-sound decoder algorithms. All devices are pin-compatible and completely code-compatible with all prior SHARC Processors. These members of the SHARC Processor family are based on a single-instruction, multiple-data (SIMD) core, which supports both 32-bit fixed-point and 32-/40-bit floating-point arithmetic formats making them particularly suitable for high-performance audio applications.

The ADSP-21362 offers the highest performance – 333 MHz/2 GFLOPs -- within the third generation SHARC Processor family. This level of performance makes the ADSP-21362 particularly well suited to address the increasing requirements of the professional and automotive audio market segments. In addition to its higher core performance, the ADSP-21362 includes additional value-added peripherals such as an S/PDIF transmitter/receiver, 8-channel asynchronous sample rate converter, and a hardware Digital Transmission Content Protection (DTCP) encryption/decryption block.

Third generation SHARC Processors also integrate application-specific peripherals designed to simplify hardware design, minimize design risks, and ultimately reduce time to market. Grouped together, and broadly named the Digital Audio Interface (DAI), these functional blocks may be connected to each other or to external pins via the software-programmable Signal Routing Unit (SRU). The SRU is an innovative architectural feature that enables complete and flexible routing amongst DAI blocks. Peripherals connected through the SRU include but are not limited to serial ports, SPI ports, S/PDIF Tx/Rx, DTCP Accelerator, and an 8-Channel asynchronous sample rate converter block.

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SHARC プロセッサ ソフトウェア&ツール

SHARC プロセッサ ソフトウェア&ツールの一覧を掲載しております。

BSDL Model Files

Designing with BGA

Surface Mount Assembly Recommendations for Plastic Ball Grid Array (PBGA) Packages

ADSP-2136x: 144 pin LQFP Package

[BSDL Original File]

ADSP-2136x: 136 Ball MBGA Package

[BSDL Original File]

設計リソース

ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well.  "Zero defects" for shipped products is always our goal.