EVAL-1CH2CHEBZ

Evaluation Board for Single and Dual Channel Standard Data Isolators in 8 lead SOIC Package

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製品概要

The EVAL-1CH2CHSOICEBZ supports single and dual channel standard data isolators in 8 lead SOIC packages. The evaluation board provides a JEDEC standard 8-lead SOIC_N and SOIC_W pad layout. This supports signal distribution, loopback, and loads referenced to VDDx or GNDx, as well as optimal bypass capacitance. Signal sources can conducted to the board through header pins or through edge-mounted SMA connectors (not supplied with board). Terminal blocks provide for power connections. The board includes 200 mil header positions for compatibility with Tektronix active probes (not supplied with board).


The board follows best printed circuit board (PCB) design practices for 4-layer boards, including a full power and ground plane on each side of the isolation barrier. No other EMI or noise mitigation design features are included on this board. In cases of very high speed operation or when ultralow emissions are required, refer to the AN-1109 application note for additional board layout techniques.

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