DIGITRIM™ TECHNOLOGY

Introduction

Many of today's most popular electronics applications, like personal computers and mobile phones, are migrating to lower operating voltages. This leaves less tolerance for errors and increases the accuracy requirements for components. This is especially true for amplifiers used in these applications. At the same time, volume for these products continues to grow, putting additional pressure on suppliers to reduce component costs. Analog Devices has developed a novel, patented trimming process that delivers the required accuracy and performance at a very low cost. The DigiTrim technique allows production of precision CMOS amplifiers at costs up to 30% lower than competitive solutions and with higher accuracy.

The key amplifier parameter for system accuracy is input offset voltage. Various techniques have been used to adjust amplifier offset voltage and other parameters. Indeed, trimming techniques have enabled the entire class of precision amplifiers to exist today. However, offset trimming and the improved accuracy it creates has not, for the most part, found its way into the high volume, low-cost CMOS amplifier segment-until now. To understand why this is true, it is necessary to examine the various trimming methods and compare their capabilities and requirements. The following chart illustrates this.

Summary of Offset Voltage Trimming Processes

  Trimmed at: Special Processing Resolution
Laser Wafer Thin Film Continuous
Zener Zap Wafer None Discrete
Link Wafer TFR or Poly Discrete
EEPROM Wafer or FT EEPROM Discrete
Chopper N/A CMOS Continuous
DigiTrim™ Wafer or FT None Discrete

DigiTrim

Digital control of adjustment currents through logic circuits and weighted current sources.

DigiTrim adjusts circuit performance by programming digitally weighted current sources. In this patented new trim method, the trim information is entered through existing analog pins using a special digital keyword sequence. The adjustment values can be temporarily programmed, evaluated and readjusted for optimum accuracy before permanent adjustment is performed. After the trim is completed, the trim circuit is locked out to prevent the possibility of any accidental re-trimming by the end user.

The physical trimming, achieved by blowing polysilicon fuses, is very reliable. No extra pads or pins are required for this trim method and no special test equipment is needed to perform the trimming. The trims can be done after packaging so that assembly related shifts may be eliminated. No testing is required at the wafer level assuming reasonable die yields. No special wafer fabrication process is required and circuits can even be produced by our foundry partners. All of the trim circuitry scales with the process features so that as the process and the amplifier circuit shrink, the trim circuit also shrinks proportionally. The trim circuits are considerably smaller than normal amplifier circuits so that they contribute minimally to die cost. The trims are discrete as in link trimming and zener zapping but the required accuracy is easily achieved at a very small cost increase over an untrimmed part.

The first part to use this new scheme is Analog Devices AD8602 dual, low cost, rail-to-rail CMOS amplifier. The offset voltage is trimmed for both high and low common-mode voltage conditions so that the offset voltage is under 500 µV over the full common mode input voltage range. With a bandwidth of 8MHz, slew rate of 5V/µS and current consumption of only 640 µA per amplifier, this part will support a variety of high volume, cost sensitive applications from bar-code scanners to GSM phones.

The DigiTrim approach could also support user trimming of system offsets with a different amplifier design.

Zener Zapping

Using a voltage to create a metallic short circuit across a trim transistor's base-emitter junction (commonly referred to as a "Zener," although the mechanism is actually avalanche breakdown of the junction), and remove a circuit element

During avalanche breakdown across a base-emitter junction, the very high current densities and associated localized heating can generate rapid metal migration between the base and emitter metal connections, leading to a metallurgical short across the junction. With proper biasing (current, voltage and time), this short will have a very low resistance value. If a series of these base-emitter junctions is arranged in parallel with a string of resistors, zapping selected junctions will short out portions of the resistor string, thereby adjusting the total resistance value.

This technique has reasonable resolution, is very reliable and requires no additional test equipment other than high-current sources to support the large avalanche currents during trimming. It is possible to perform zener-zap trimming in package which can compensate for assembly related shifts in the offset voltage. However, trimming in package requires package pins. Trimming at the wafer level requires additional probe pads. Probe pads do not scale effectively as the process features shrink. So, the die area required for trimming is relatively constant regardless of the process geometries. Some form of bipolar transistor is required for the trim structures so a purely MOS based process may not have zener zap capability. The nature of the trims is discrete since each zap removes a predefined resistance value. Increasing trim resolution requires additional transistors and pads/pins, which rapidly increase the total die area and/or package cost. This technique is most cost-effective for fairly large geometry processes where the trim structures and probe pads make up a relatively small percentage of the overall die area.

Analog Devices pioneered the use of zener-zap trimming, creating the industry standard OP07 precision amplifier and virtually inventing the precision amplifier category. The OP07 and similar parts must be able to operate from over ±15V supplies. As a result they utilize relatively large device geometries to support the high voltage requirements.

Laser Trim

"Cutting" resistors with a laser to increase their value

Localized adiabatic heating from a tightly focused laser beam causes changes in the material characteristics of thin film resistive materials where the beam meets the die and causes the material to become non-conducting. As the beam traces along a resistor, it effectively changes the width of the resistor. Since the resistor's value is proportional to its width, this permanently changes the resistor's value. By controlling the path and speed of the laser beam, the resistor's value can be adjusted to very precise values. A/D and D/A converters of up to 16 bit accuracy often use laser trimming to achieve the very tight matching needed for this level of accuracy.

The thin film resistors themselves are very stable with temperature and can add to the thermal stability and accuracy of a device, even without trimming. Laser trims are reliable as long as both the wafer fabrication and the trimming process are tightly controlled. The process requires the integration of thin film deposition and patterning. Other parts of the process must be tailored to the laser characteristics to enable accurate trimming. Expensive laser systems must be purchased for the trim operation. The size of the trim structures is dependent on the beam size and accuracy of the laser trimming equipment and does not scale with the process features. Since in-package trimming is not possible, assembly related shifts cannot be compensated and wafer level testing is required. Laser trimming is most effective where extremely fine adjustment is required.

Analog Devices also pioneered the use of thin film resistors and laser trimming and uses this technology extensively in precision amplifiers, references and converters.

Link Trim

Cutting metal or poly-silicon links to remove a connection

In link trimming, either a laser or a high current is used to destroy a "shorted" connection across a parallel resistive element. Removing the connection increases the effective resistance of the combined element(s). Laser cutting works similar to laser trimming of thin films, the high local heat from the laser beam causes material changes which lead to a non-conductive area, effectively cutting a metal or conductive polysilicon connector. The high-current link trim method works like zener-zapping except that the conductive connection is destroyed rather than created by the heat generated due to the high current density.

Link trim structures tend to be somewhat more compact than laser trim structures. No special processes are required in general although the process may have to be tailored to the laser characteristics if laser cutting is used. With the high current trimming method, testing at the wafer level may not be required if die yields are good. The laser trimmable scheme doesn't require extra contact pads but the trim structures don't scale with the process feature sizes. This type of trimming cannot be performed in package, either. The current trimmed version requires additional probe pads and it can require extra package pins for in-package trims. Like Zener zapping the trimming is discrete. Improvements to trim resolution require additional link structures and rapidly increase the die area.

EEPROM

Stores values in a memory that addresses a DAC to adjust a current or voltage

EEPROM trim utilizes special, non-volatile digital memory to store trim data. The stored data bits control adjustment currents through on-chip D/A converters.

Memory cells and D/A converters scale with the process feature size. In-package trimming and even trimming in the customer's system is possible so that assembly related shifts could be trimmed out. Testing at the wafer level is not required if yields are reasonable. No special hardware is required for the trimming beyond the normal mixed signal tester system although test software development may be more complicated.

Since the trims can be overwritten, it is possible to periodically reprogram the system to account for long-term drifts or to modify system characteristics to meet new requirements. The number of reprogram cycles possible depends on the process and is finite. Most EEPROM processes provide enough rewrite cycles to easily handle routine re-calibration.

This trim method does require special processing. Stored trim data could be lost under certain conditions, especially at high operating temperatures. At least one extra digital contact pad/package pin is required to input the trim data to the on-board memory.

This technique is only available on MOS based processes due to the very thin oxide requirements. The biggest drawback is that the on-board D/A converters are large - often larger than the amplifier circuits they are adjusting. For this reason, EEPROM is mostly used for data converter or system level products where the trim D/A's represent a much smaller percentage of the overall die area.

Chopper (Auto-Zero) Amplifiers

Dynamic adjustment using switches, capacitors and additional amplifiers

Although not a trim method as such, chopper stabilized or auto-zero amplifiers address the same need for increased accuracy. Modern auto-zero amplifiers use logic circuitry, switches, storage capacitors and an extra nulling amplifier stage to continuously adjust offset voltage to very low values.

Because offsets are continuously adjusted, their drift over temperature and over time is extremely small. The same continuous adjustment eliminates the exponential "1/f" noise that occurs in conventional amplifier designs at very low frequencies. Testing at the wafer level is not required if device yields are reasonable and no special test equipment is required (although measuring the very low offsets is challenging). These amplifiers provide the best DC accuracy available, with very low offset voltage and drift, and very high gain, power supply rejection and common mode rejection. However, they do suffer from digital switching noise from the chopping clock. They also consume more power supply current for a given device bandwidth than a conventional amplifier design. The on-chip storage capacitors are large and they scale with the capacitor oxide thickness rather than with the process feature size.

The AD855x and AD857x amplifiers from Analog Devices are the lowest cost auto-zero amplifiers available. However, while their cost is substantially lower than other auto-zero amplifiers, they are still too expensive for many high volume applications that don't require their incredible accuracy.

DigiTrim™ Diagram

A simplified representation of ½ of the AD8602 amplifier with DigiTrim™ is shown in fig. A (below).

AD8602 Simplified Drawing

Fig. A Simplified drawing - ½ of the AD8602

DigiTrim is a trademark of Analog Devices, Inc.

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