The driver circuits shown in this circuit note are optimized for dc-coupled applications requiring low distortion and low noise performance. This drive circuit ensures that the maximum AD7266 performance is achieved by providing adequate settling time, low distortion, and low output impedance.

In applications where the signal source has high impedance, it is recommended to buffer the analog input signal before applying it to the switched capacitor inputs of the AD7266. This isolates the source from the transient currents which appear at the input of the ADC. A dual op amp pair can be used to directly couple a differential signal to one of the analog input pairs of the AD7266. The AD8022 is an ideal choice for the dual op amp and has low power (4 mA/amp), low noise (2.7 nV/√Hz @ 100 kHz), and low distortion (110 dB SFDR @ 200 kHz). The AD7266 has a specified minimum acquisition time of 90 ns with a supply voltage of 5 V. This is the time from when the part enters track mode until the next conversion is initiated. The op amp selected must have adequate settling time to meet the acquisition time require-ments of the AD7266 and achieve the specified performance.

The circuit configuration illustrated in Figure 1 shows how an AD8022 op amp can be used to convert a bipolar single-ended signal into a unipolar differential signal that can be applied directly to the AD7266 analog inputs. The circuit not only performs the single-ended-to-differential conversion but also level shifts the output signal to match the ADC input range. The voltage applied to Point A sets up the common-mode voltage for each half of the AD8022. The 10 kΩ/20 kΩ divider generates this voltage (1.67 V) from the AD7266 2.5 V internal reference. If the on-chip 2.5 V reference on the AD7266 is to be used else-where in a system (as illustrated in Figure 1 and Figure 2), the output from D_CAPA and D_CAPB must first be buffered. The OP177 features the highest precision performance of any op amp currently available and is a perfect choice for a reference buffer.

The primary negative feedback path is provided by R2 to R1, and the gain from VIN to V_A2 is set by the ratio of R2 to R1. In this case, the ratio is 0.5. The common-mode voltage of 1.67 V at the input of the upper half of the AD8022 produces an output common-mode voltage at V_A2 of (1 + R2/R1) × 1.67 V = 2.5 V. Localized feedback supplied by resistors R3 and R4 produce a signal at VA1, which is 180° out of phase with the signal at V_A2.

When the input voltage is zero, V_A1 and V_A2 must be 2.5 V. This requires a current in both R3 and R4 of

(2.5 V − 1.67 V)/221 Ω = 3.76 mA

The current through R5 is, therefore, 2 × 3.76 mA = 7.52 mA. Hence, R5 must be equal to R3 and R4 to force the common-mode voltage at V_A1 to be 2.5 V.

The AD7266 can have a total of 12 single-ended analog input channels. The analog input range can be programmed to be either 0 to V_REF or 0 to 2 × V_REF . Figure 2 shows a typical connection diagram when operating the ADC in single-ended mode, where an AD8022 is used to drive a pair of discrete channels. The AD8021 is a high performance single op amp that can be used as an alternative to a dual device in very high performance systems. The absolute value of R is flexible, but it must be chosen to achieve the desired bandwidth of the op amp.

Note that, in both Figure 1 and Figure 2, the AD8022 operates on dual 12 V supplies, whereas the AD7266 is specified for power supply voltages of 2.7 V to 5.25 V. Care must be taken to ensure that the maximum input voltage limits of the AD7266 are not exceeded during transient or power-on conditions (see MT-036 Tutorial). In addition, the circuit must be constructed on a multilayer PC board with a large area ground plane. Proper layout, grounding, and decoupling techniques must be used to achieve optimum performance (see MT-031 Tutorial, MT-101 Tutorial, and the AD7266 evaluation board layout).

The OP07D, an ultralow offset voltage op amp, is a lower cost alternative to the OP177. It offers similar performance with the exception of the input offset voltage specification.