This circuit is a multichannel DAC configuration with excellent temperature drift performance. It provides 32 individual voltage channels with 12 bits of resolution and a temperature stability of typically less than 3 ppm/°C.

Figure 1 shows a typical configuration for the AD5383 when configured for use with an external reference. In the circuit shown, all AGND, SIGNAL_GND, and DAC_GND pins are tied together to a common AGND. AGND and DGND are connected together at the AD5383 device. On power-up, the AD5383 defaults to external reference operation.

This design uses two separate 5.0 V power supplies—one to power the voltage reference and the analog portion of the AD5383 (AVDD), the other to power the digital portion of the AD5383 (DVDD). For best performance, a linear regulator should always be used to power the analog portion of the circuit. If a switching regulator is used to power the digital portion, care should be taken to minimize switching noise at the DVDD supply pins. Additional decoupling using a series connected ferrite bead may be required. The AD5383 digital (DVDD) power supply can operate from a 3 V or 5 V supply, which provides for maximum flexibility when interfacing to digital components. Both supplies can be tied together to a common 5 V supply, provided that supply is derived from a linear regulator. Refer to the ADIsimPower™ design tool for guidance on the power supply designs.

It is recommended to decouple close to the device with a 0.1 μF ceramic and a 10 μF tantalum capacitor. In this circuit, the reference for the AD5383 is provided externally from either an ADR421 or ADR431 2.5 V reference. The ADR431 provides a lower output voltage noise specification for applications where that specification is important. The reference should be decoupled at the REFOUT/REFIN pin of the device with a 0.1 μF capacitor.

A variation of this circuit is the AD5383-3 with the ADR280 1.2 V reference where all other connections and components are the same as those outlined above.