Design Note DN539: Introduction
The LTC3305 is a lead-acid battery balancer that uses an auxiliary battery or an alternative storage cell (AUX) to transfer charge to and from individual batteries within a series-connected stack. The balancer controls external NMOS switches to sequentially connect the auxiliary battery to each battery in the stack. To prevent damage to the NMOS switches and their interconnecting PCB traces, a current limiting device is required. One such device is a ceramic positive temperature coefficient (PTC) thermistor.
The PTC thermistor limits the peak current in the connection between the AUX cell and the battery. For relatively small differential voltages (VDIFF) between the AUX cell and the battery that is connected, the current through the PTC remains low, as does its temperature, and the PTC exhibits the characteristics of a constant value resistor. As VDIFF increases, current increases, and the temperature of the PTC rises. When the temperature of the PTC reaches its Curie point, its resistance increases sharply, as shown in Figure 1. Once the Curie point is reached, current is limited by the resistance of the PTC. In this way, the PTC acts as a constant power device, limiting the pass-through current as the VDIFF increases.
Predicting the balancing current of the LTC3305 involves plotting a current-voltage curve for the total circuit resistance between the AUX cell and the battery that is being balanced. This line is then superimposed on the current-voltage static characteristic curve (Figure 2) for the PTC. The PTC current-voltage characteristic curve can be obtained from the PTC vendor or produced in the lab. The PTC current-voltage characteristic curves can then be used to calculate the current through the battery and the AUX cell, once the total circuit resistance is known.
Predicting the Balancing Current
The total circuit resistance between the AUX cell and the battery consists of the ESR of the AUX cell (ESRAUX), the ESR of the battery (ESRBAT), the RDS(ON) of the MOSFET switches and the PTC resistance (RPTC). When balancing BAT1 and BAT4, there are four series (NFET = 4) MOSFET switches in the circuit, while BAT2 and BAT3 have five series (NFET = 5) MOSFET switches (see the first page of the LTC3305 data sheet). Any interconnection resistances between the batteries and the auxiliary cell can be lumped into the ESR of the respective battery and the AUX cell. This interconnection resistance must include both the positive and negative terminals’ interconnection resistances. The expression below is the total resistance (RTOTAL) between the auxiliary cell and the battery, where NFET is the number of series MOSFET switches.
RTOTAL = ESRAUX + ESRBAT + RPTC + NFET • RDS(ON)
Figure 3 shows RTOTAL superimposed on the I-V characteristic curve of the PTC. The arrow line is the locus of balance currents for various VDIFF. As VDIFF increases, the balancing current increases along the total resistance curve. When the differential voltage produces a balancing current that exceeds the Curie point current, the PTC resistance increases, eventually dominating the total circuit resistance. The Curie point current is referred to as the trip current in the data sheet. With increasing PTC resistance, the balancing current drops sharply, approaching the negative slope of the I-V curve for the PTC.
Eventually, enough charge is transferred between the AUX cell and the battery being balanced and VDIFF begins to drop. As VDIFF decreases, just follow the I-V characteristic the other way. As VDIFF decreases, the balancing current increases as it follows the RTOTAL I-V curve until it reaches the Curie point current. The PTC resistance remains constant at this point, with the balancing current following the RTOTAL line.
The example shown here uses a PTC (PTGLASARR27M1B51B0) with a trip current of 1.9A and a cold resistance of 0.27Ω. The I-V curve for the PTC, shown in Figure 4, was generated in the lab.
The ESRs of the auxiliary cell and the battery are 100mΩ and 50mΩ, respectively. Four MOSFET switches each have an RDS(ON) of 10mΩ. VDIFF for each battery and the auxiliary cell can be calculated using the following:
VDIFF = IPTC • (ESRAUX + ESRBAT + NFET • RDS(ON)) + VPTC
Figure 5 shows the current flowing through the system plotted against various values of VDIFF along with the current flowing through the PTC, or the balancing current (IBAL). The system curve is the locus of balancing currents as a function of VDIFF. The differential trip voltage is increased above the PTC trip voltage due to the additional voltage drop across the parasitic resistance within the circuit. As the differential voltage increases, the two curves overlay each other as the RPTC dominates RTOTAL.
When the differential voltage is above the VTRIP, the balance current is lower since the PTC resistance is increasing. For differential voltages below VTRIP, the balance current is the differential voltage divided by the total circuit resistance. A battery voltage of 12.5V and an auxiliary cell voltage of 12.0V produces a balancing current of 1.12A, which agrees with the I-V curve of Figure 5.
The LTC3305 balances the voltage across a series stack of lead-acid batteries and an auxiliary storage cell. Balancing currents can be controlled with the use of a ceramic PTC thermistor. Using the trip current and cold resistance parameters specified for the PTC thermistor along with the other balancing circuit parasitic resistances, the balancing currents can be predicted for various differential voltages between the batteries and the auxiliary cells.