The AD9550 is a phase-locked loop (PLL) based clock translator designed to address the needs of wireline communication and base station applications. The device employs an integer-N PLL to accommodate the applicable frequency translation requirements. It accepts a single-ended input reference signal at the REF input.
The AD9550 is pin programmable, providing a matrix of standard input/output frequency translations from a list of 15 possible input frequencies to a list of 51 possible output frequency pairs (OUT1 and OUT2).
The AD9550 output is compatible with LVPECL, LVDS, or single-ended CMOS logic levels, although the AD9550 is implemented in a strictly CMOS process.
The AD9550 operates over the extended industrial temperature range of −40°C to +85°C.
|Title||Content Type||File Type|
|AD9550: Integer-N Clock Translator for Wireline Communications (Rev 0, 09/2010) (pdf, 399 kB)||Data Sheets|
|UG-203: Evaluating the AD9550 Integer-N Clock Translator (pdf, 201 kB)||User Guides|
|RAQs index||Rarely Asked Questions||HTML|
|Glossary of EE Terms||Glossary||HTML|
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