6.5 Gbps Dual Buffer Mux/Demux
The nonblocking switch-core of the AD8155 implements a 2:1 multiplexer and 1:2 demultiplexer per lane and supports independent lane switching through the two select pins, SEL[1:0]. Each port is a two-lane link. Every lane implements an asynchronous path supporting dc to 6.5 Gbps NRZ data, fully independent of other lanes. The AD8155 has low latency and very low lane-to-lane skew.
The main application of the AD8155 is to support redundancy on both the backplane and the line interface sides of a serial link. The demultiplexing path implements unicast and bicast capability, allowing the part to support either 1+1 or 1:1 redundancy.
The AD8155 is also suited for testing high speed serial links because of its ability to duplicate incoming data. In a port monitoring application, the AD8155 can maintain link connectivity with a pass-through connection from Port C to Port A while sending a duplicate copy of the data to test equipment on Port B.
The rich feature set of the AD8155 can be controlled either through external toggle pins or by setting on-chip control registers through the I2C® interface.
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