Low Phase Noise, Fast Settling 6 GHz PLL Frequency Synthesizer
The ADF4196 frequency synthesizer can be used to implement local oscillators (LO) in the upconversion and downconversion sections of wireless receivers and transmitters. Its architecture is specifically designed to meet the GSM/EDGE lock time requirements for base stations, and the fast settling feature makes the ADF4196 suitable for pulse Doppler radar applications.
The ADF4196 consists of a low noise, digital phase frequency detector (PFD) and a precision differential charge pump. A differential amplifier converts the differential charge pump output to a single-ended voltage for the external voltage controlled oscillator (VCO). The sigma-delta (Σ-Δ) based fractional interpolator, working with the N divider, allows programmable modulus fractional-N division. Additionally, the 4-bit reference (R) counter and on-chip frequency doubler allow selectable reference signal (REFIN) frequencies at the PFD input.
A complete phase-locked loop (PLL) can be implemented if the synthesizer is used with an external loop filter and a VCO. The switching architecture ensures that the PLL settles within the GSM time slot guard period, removing the need for a second PLL and associated isolation switches. This decreases the cost, complexity, PCB area, shielding, and characterization found on previous ping-pong GSM PLL architectures.
- GSM/EDGE base stations
- PHS base stations
- Pulsed Doppler radar
- Instrumentation and test equipment
- Beam-forming/phased array systems
This product has been released to the market. The data sheet contains all final specifications and operating conditions. For new designs, ADI recommends utilization of these products.
This page contains ordering information for the evaluation board used to evaluate the ADF4196 Low Phase Noise, Fast Settling 6 GHz PLL Frequency Synthesizer.
NOTE: An ADF4196 chip needs to be soldered to the EVAL-ADF4193EBZ2 board.
This evaluation board requires an SDP Controller board for connection to the PC. The SDP controller board connects to the PC via USB 2.0. The evaluation board will connect to the SDP controller board. The evaluation board cannot be connected directly to the PC. The evaluation software running on the PC will communicate through the SDP Controller board, to the evaluation board. The SDP Controller board is a separate list item in the ordering guide below (EVAL-SDP-CS1Z). If you have not previously purchased an SDP Controller board, please do so to ensure a full evaluation setup.
Recommended Linear Regulators
Recommended Divide-by-4 Prescaler
- For a low noise, low power, fixed RF block: ADF5001.
Recommended PLL Active Filter
- For an ultralow noise, rail-to-rail amplifier: OP184.
Product Selection Guide
RF, Microwave, and Millimeter Wave IC Selection Guide 2017
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