Dual Power PLL Frequency Synthesizer
The ADF4212L is a dual frequency synthesizer that can be used to implement local oscillators (LO) in the up-conversion and down-conversion sections of wireless receivers and transmitters. It can provide the LO for both the RF and IF sections. It consists of a low noise digital phase frequency detector (PFD), a precision charge pump, a programmable reference divider, programmable A and B counters, and a dual modulus prescaler (P/P + 1). The A (6-bit) and B (12-bit) counters, in conjunction with the dual modulus prescaler (P/P + 1), implement an N divider (N = BP + A). In addition, the 15-bit reference counter (R Counter), allows selectable REFIN frequencies at the PFD input. A complete phase-locked loop (PLL) can be implemented if the synthesizer is used with external loop filters and voltage controlled oscillators (VCOs).
Control of all the on-chip registers is via a simple 3-wire interface with 1.8 V compatibility. The devices operate with a power supply ranging from 2.7 V to 3.3 V and can be powered down when not in use.
- Wireless handsets (GSM, PCS, DCS, DSC1800, CDMA, WCDMA)
- Base stations for wireless Radio (GSM, PCS, DCS, CDMA, WCDMA)
- Wireless LANS
- Cable TV tuners (CATV)
- Communications test equipment
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Recommended Divide-by-4 Prescaler
- For a low noise, low power, fixed RF block , we recommend the ADF5001 .
Recommended PLL Active Filter
- For an ultralow noise, rail-to-rail amplifier , we recommend the OP184 .
Product Selection Guide
RF Source Booklet
RF IC Product Overview
Phase Locked Loops for High-Frequency Receivers and Transmitters – Part 1
Phase-Locked Loops for High-Frequency Receivers and Transmitters - Part 2
Phase Locked Loops for High-Frequency Receivers and Transmitters – Part 3