8 GHz integer-N PLL
The ADF4108 frequency synthesizer can be used to implement local oscillators in the up-conversion and down-conversion sections of wireless receivers and transmitters. It consists of a low-noise digital PFD (phase frequency detector), a precision charge pump, a programmable reference divider, programmable A and B counters, and a dual-modulus prescaler (P/P + 1). The A (6-bit) and B (13-bit) counters, in conjunction with the dual-modulus prescaler (P/P + 1), implement an N divider (N = BP + A). In addition, the 14-bit reference counter (R counter), allows selectable REFIN frequencies at the PFD input. A complete PLL (phase-locked loop) can be implemented if the synthesizer is used with an external loop filter and VCO (voltage controlled oscillator). Its very high bandwidth (8GHz) means that frequency doublers or prescalers can be eliminated in many high frequency systems, simplifying system architecture and reducing cost.
- Broadband wireless access
- Satellite systems
- Wireless LANs
- Base stations for wireless radio
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This product has been released to the market. The data sheet contains all final specifications and operating conditions. For new designs, ADI recommends utilization of these products.
Recommended Linear Regulators
Recommended Divide-by-4 Prescaler
- For a low noise, low power, fixed RF block , we recommend the ADF5001 .
Recommended PLL Active Filter
- For an ultralow noise, rail-to-rail amplifier , we recommend the OP184 .
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