Features and Benefits
- Rx mixer with integrated fractional-N PLL
- RF input frequency range: 300 MHz to 2500 MHz
- Internal LO frequency range:
750 MHz to 1160 MHz
- Input P1dB: 14.5 dBm
- Input IP3: 31 dBm
- IIP3 optimization via external pin
- SSB noise figure
IP3SET pin open: 13.5 dB
IP3SET pin at 3.3 V: 14.6 dB
- Voltage conversion gain: 6.7 dB
- Matched 200 Ω IF output impedance
- IF 3 dB bandwidth: 500 MHz
- Programmable via 3-wire SPI interface
- 40-lead, 6 mm × 6 mm LFCSP
The ADRF6601 is a high dynamic range active mixer with an integrated phase-locked loop (PLL) and a voltage controlled oscillator (VCO). The PLL/synthesizer uses a fractional-N PLL to generate a fLO input to the mixer. The reference input can be divided or multiplied and then applied to the PLL phase frequency detector (PFD).
The PLL can support input reference frequencies from 12 MHz to 160 MHz. The PFD output controls a charge pump whose output drives an off-chip loop filter.
The loop filter output is then applied to an integrated VCO. The VCO output at 2 × fLO is applied to an LO divider, as well as to a programmable PLL divider. The programmable PLL divider is controlled by a sigma-delta (Σ-Δ) modulator (SDM). The modulus of the SDM can be programmed from 1 to 2047.
The active mixer converts the single-ended 50 Ω RF input to a 200 Ω differential IF output. The IF output can operate up to 500 MHz.
The ADRF6601 is fabricated using an advanced silicon-germanium BiCMOS process. It is available in a 40-lead, RoHS-compliant, 6 mm × 6 mm LFCSP with an exposed paddle. Performance is specified over the −40°C to +85°C temperature range.
- Cellular base stations
Product Lifecycle Recommended for New Designs
This product has been released to the market. The data sheet contains all final specifications and operating conditions. For new designs, ADI recommends utilization of these products.
Evaluation Kits (1)
ADRF6601-EVALZ is a fully populated, 4-layer, Rogers 4350-based evaluation board. A 5 V/300 mA power supply is required and should be connected to the test points labeled VCC and GND (red and black). The PLL reference should be connected to the SMA connector labeled REF_IN, the RF input to the SMA labeled RF_IN and the IF output to the SMA labeled OUT. The evaluation board can be programmed through the USB port of a PC running Windows XP or Vista with Microsoft .NET Framework 3.5 installed. The required control software can be downloaded from www.analog.com.
Software & Systems Requirements
Tools & Simulations
ADIsimPLL enables the rapid and reliable evaluation of new high performance PLL products from ADI. It is the most comprehensive PLL Synthesizer design and simulation tool available today. Simulations performed include all key non-linear effects that are significant in affecting PLL performance. ADIsimPLL removes at least one iteration from the design process, thereby speeding the design- to-market.
ADIsimRF is an easy-to-use RF signal chain calculator. Cascaded gain, noise, distortion and power consumption can be calculated, plotted and exported for signal chains with up to 50 stages. ADIsimRF also includes an extensive data base of device models for ADI’s RF and mixed signal components.
ADRF6601 Companion Parts
Product Selection Guide (1)
Technical Articles (1)
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal.
Sample & Buy
The USA list pricing shown is for BUDGETARY USE ONLY, shown in United States dollars (FOB USA per unit for the stated volume), and is subject to change. International prices may differ due to local duties, taxes, fees and exchange rates. For volume-specific price or delivery quotes, please contact your local Analog Devices, Inc. sales office or authorized distributor. Pricing displayed for Evaluation Boards and Kits is based on 1-piece pricing.