Features and Benefits
- I/Q demodulator with integrated fractional-N PLL
- RF input frequency range: 695 MHz to 2700 MHz
- Internal LO frequency range: 356.25 MHz to 2850 MHz
- Input P1dB: 14.5 dBm at 1900 MHz RF
- Input IP3: 35 dBm at 1900 MHz RF
- Programmable HD3/IP3 trim
- Single pole, double throw (SPDT) RF input switch
- RF digital step attenuation range: 0 dB to 15 dB
- Integrated RF tunable balun for single-ended 50 Ω input
- Multicore integrated VCO
- Demodulated 1 dB bandwidth: 600 MHz
- Demodulated 3 dB bandwidth: 1400 MHz
- 4 selectable baseband gain and bandwidth modes
- Digital programmable LO phase offset and dc nulling
- Programmable via 3-wire serial port interface (SPI)
- 40-lead, 6 mm × 6 mm LFCSP
The ADRF6820 is a highly integrated demodulator and synthesizer ideally suited for next generation communication systems. The feature rich device consists of a high linearity broadband I/Q demodulator, an integrated fractional-N phase-locked loop (PLL), and a low phase noise multicore, voltage controlled oscillator (VCO). The ADRF6820 also integrates a 2:1 RF switch, an on-chip tunable RF balun, a programmable RF attenuator, and two low dropout (LDO) regulators. This highly integrated device fits within a small 6 mm × 6 mm footprint.
The high isolation 2:1 RF switch and on-chip tunable RF balun enable the ADRF6820 to support two single-ended, 50 Ω terminated RF inputs. A programmable attenuator ensures an optimal differential RF input level to the high linearity demodulator core. The integrated attenuator offers an attenuation range of 0 dB to 15 dB with a step size of 1 dB.
The ADRF6820 offers two alternatives for generating the differential local oscillator (LO) input signal: externally via a high frequency, low phase noise LO signal or internally via the on-chip fractional-N synthesizer. The integrated synthesizer enables continuous LO coverage from 356.25 MHz to 2850 MHz. The PLL reference input can support a wide frequency range because the divide or multiplication blocks can increase or decrease the reference frequency to the desired value before it is passed to the phase frequency detector (PFD).
When selected, the output of the internal fractional-N synthesizer is applied to a divide-by-2 quadrature phase splitter. From the external LO path, a 1× LO signal can be applied to the built-in polyphase filter, or a 2× LO signal can be used with the divide-by-2 quadrature phase splitter to generate the quadrature LO inputs to the mixers.
The ADRF6820 is fabricated using an advanced silicon-germanium BiCMOS process. It is available in a 40-lead, RoHS-compliant, 6 mm × 6 mm LFCSP package with an exposed paddle. Performance is specified over the −40°C to +85°C temperature range.
- Cellular W-CDMA/GSM/LTE
- Digital predistortion (DPD) receivers
- Microwave point-to-point radios
Product Lifecycle Recommended for New Designs
This product has been released to the market. The data sheet contains all final specifications and operating conditions. For new designs, ADI recommends utilization of these products.
Evaluation Kits (1)
ADRF6820-EVALZ is a full featured evaluation board allowing all the necessary support circuitry to operate the ADRF6820 in its various configurations. The evaluation board includes an on-board USB to allow for register programming via the SPI port of the ADRF6820. For ease of evaluation, a footprint for an optional crystal oscillator for the PLL reference input is integrated on the board, therefore not requiring an additional signal source. The I and Q outputs of the demodulator can be outputted single-ended or differentially where the necessary SMA connectors and balun are populated. Finally, the ADRF6820-EVALZ is populated with multiple power management options including LDOs, switching regulators, and the option to bypass the power management circuitry and to directly source the ADRF6820 with external power supplies. The ADRF6820-EVALZ is a 6 layer, FR-4 based evaluation board, and with the power management option only a +6V source is required. The required software that complements the evaluation board can be found on the ADI webpage.
Software & Systems Requirements
Tools & Simulations
ADRF6820 Companion Parts
- For 12-bit, 370 MSPS / 500 MSPS, 1.8 V LVDS output, analog to digital converter: AD9434.
- For 14-bit, 170 MSPS / 250 MSPS, JESD204B, dual analog to digital converter: AD9250.
- For 14-bit, 80 MSPS / 155 MSPS, 1.8 V serial output, analog to digital converter: AD9641.
- For 12-bit, 170 MSPS / 210 / 250 MSPS, 1.8 V LVDS output, analog to digital converter: AD9634.
Product Selection Guide (1)
Analog Dialogue (1)
Press Release (1)
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal.
Sample & Buy
The USA list pricing shown is for BUDGETARY USE ONLY, shown in United States dollars (FOB USA per unit for the stated volume), and is subject to change. International prices may differ due to local duties, taxes, fees and exchange rates. For volume-specific price or delivery quotes, please contact your local Analog Devices, Inc. sales office or authorized distributor. Pricing displayed for Evaluation Boards and Kits is based on 1-piece pricing.