Multirate 155 Mbps/622 Mbps/1244 Mbps/1250 Mbps Burst Mode Clock and Data Recovery IC with Deserializer
The ADN2855 frequency locks to the OLT reference clock and aligns to the input data within 12 bits of the start of the preamble. The device provides a full rate or an optional half rate output clock for a double data rate (DDR) interface to an FPGA or digital ASIC.
All specifications are quoted for −40°C to +85°C ambient temperature, unless otherwise noted. The ADN2855 is available in a compact 5 mm × 5 mm, 32-lead chip scale package.