Continuous Rate 8.5 Gbps to 11.3 Gbps Clock and Data Recovery IC with Integrated Limiting Amp/EQ
The ADN2917 provides manual or automatic slice adjust and manual sample phase adjusts. Additionally, the user can select a limiting amplifier or equalizer at the input. The equalizer is either adaptive or can be manually set.
The receiver front-end loss of signal (LOS) detector circuit indicates when the input signal level has fallen below a user-programmable threshold. The LOS detect circuit has hysteresis to prevent chatter at the LOS output. In addition, the input signal strength can be read through the I2C registers.
The ADN2917 also supports pseudorandom binary sequence (PRBS) generation, bit error detection, and input data rate readback features. The ADN2917 is available in a compact 4 mm × 4 mm, 24-lead frame chip scale package (LFCSP). All ADN2917 specifications are defined over the ambient temperature range of −40°C to +85°C, unless otherwise noted.
- SONET/SDH OC-192, 10GFC, and 10GE and all associated FECs
- XFP, line cards, clocks, routers, repeaters, instruments
- Any rate regenerators/repeaters
This product has been released to the market. The data sheet contains all final specifications and operating conditions. For new designs, ADI recommends utilization of these products.
The ADN2905, ADN2913, ADN2915, and ADN2917 provide the receiver functions of quantization, signal level detect, and clock/data recovery for a continuous signal data rate range from 6.5 Mbps to 11.3 Gbps. The ADN29xx automatically lock to such a data signal without referring to an external clock or extra programming. All SONET/SDH jitter requirements are exceeded, including jitter transfer, jitter generation, and jitter tolerance. All specifications are quoted for the –40°C to +85°C temperature range, unless otherwise noted.
For the best input signal detection, the ADN29xx input circuitry can be configured as a limiting amplifier, an equalizer, or a 0 dB equalizer. Additionally, the ADN29xx provide manual control of sampling phase and slice level adjust to optimize the incoming data eye detection.
The loss of signal (LOS) is available in limiting amplifier input mode only. The asserted LOS indicates that the input signal level has fallen below a preset threshold. The LOS detect circuit provides a typical 6.0 dB hysteresis to prevent LOS output chatter.
The asserted loss of lock (LOL) indicates when incoming signal rate shifts more than 1000 ppm away from the CDR VCO frequency.
The ADN29xx are available in a compact 4 mm × 4 mm, 24-lead chip scale package (LFCSP).
Full specifications on the ADN2905/ADN2913/ADN2915/ADN2917 are available in the product data sheet, which should be consulted in conjunction with this user guide when working with the evaluation board.
The ADN2905, ADN2913, ADN2915, and ADN2917 are pin-to-pin compatible devices and share the same evaluation board. Each EVALZ-ADN29xx evaluation board is populated by a different DUT: ADN2905 on the EVALZ-ADN2905, ADN2913 on the EVALZ-ADN2913, ADN2915 on the EVALZ-ADN2915, and ADN2917 on the EVALZ-ADN2917.
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal.
The USA list pricing shown is for BUDGETARY USE ONLY, shown in United States dollars (FOB USA per unit for the stated volume), and is subject to change. International prices may differ due to local duties, taxes, fees and exchange rates. For volume-specific price or delivery quotes, please contact your local Analog Devices, Inc. sales office or authorized distributor. Pricing displayed for Evaluation Boards and Kits is based on 1-piece pricing.