3.3 V, 100 Mbps, Full-Duplex, High Speed M-LVDS Transceiver with Type 1 Receiver
The ADN4690E/ADN4692E are multipoint, low voltage differential signaling (M-LVDS) transceivers (driver and receiver pairs) that can operate at up to 100 Mbps (50 MHz). To improve the integrity of the output signal and minimize reflections, slew rate control is implemented on the driver outputs. The receivers detect the bus state with a differential input of as little as 50 mV over a common-mode voltage range of −1 V to +3.4 V. ESD protection of up to ±15 kV is implemented on the bus pins.
The ADN4690E/ADN4692E adhere to the TIA/EIA-899 standard for M-LVDS and complement TIA/EIA-644 LVDS devices with additional multipoint capabilities. The driver allows bus loads of as little as 30 Ω on a multipoint bus topology, and driver output transition times are controlled to minimize reflections. Up to 32 nodes can be connected to the bus.
The ADN4690E/ADN4692E are Type 1 receivers that are designed to have 25 mV of hysteresis on the differential input voltage, so that slow-changing signals or a loss of input does not lead to output oscillations.
The ADN4690E/ADN4692E are available as half-duplex configurations in an 8-lead SOIC package (the ADN4690E) or as full-duplex configurations in a 14-lead SOIC package (the ADN4692E).
- Backplane and cable multipoint data transmission
- Multipoint clock distribution
- Low power, high speed alternative to shorter RS-485 links
- Networking routers and switches
- Wireless base station infrastructure
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This product has been released to the market. The data sheet contains all final specifications and operating conditions. For new designs, ADI recommends utilization of these products.
The EVAL-ADN469xEFDEBZ allows quick and easy evaluation of full-duplex M-LVDS transceivers (ADN4692E, ADN4693E, ADN4695E, and ADN4697E). The evaluation board allows all of the input and output functions to be exercised without the need for external components. Screw terminal blocks provide convenient connections for power and ground, with SMB jack connectors for high speed logic and M-LVDS bus signals.
The evaluation board has a 14-lead SOIC footprint for a full-duplex M-LVDS transceiver from the ADN469xE family.