Single, 3 V, CMOS, LVDS, High Speed Differential Driver
The device accepts low voltage TTL/CMOS logic signals and converts them to a differential current output of typically ±3.1 mA for driving a transmission medium such as a twisted-pair cable. The transmitted signal develops a differential voltage of typically ±355 mV across a termination resistor at the receiv-ing end, and this is converted back to a TTL/CMOS logic level by a line receiver.
The ADN4661 and a companion LVDS receiver offer a new solution to high speed point-to-point data transmission, and a low power alternative to emitter-coupled logic (ECL) or positive emitter-coupled logic (PECL).
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At least one model within this product family is in production and available for purchase. The product is appropriate for new designs but newer alternatives may exist.