LC2MOS Complete, Dual 12-Bit MDAC, (8 + 4) Loading Structure
Both parts are microprocessor compatible, with high speed data latches and interface logic. The AD7847 accepts 12-bit parallel data which is loaded into the respective DAC latch using the WR input and a separate Chip Select input for each DAC. The AD7837 has a double-buffered 8-bit bus interface structure with data loaded to the respective input latch in two write operations. An asynchronous LDAC signal on the AD7837 updates the DAC latches and analog outputs.
The output amplifiers are capable of developing ±10 V across a 2 kOhm load. They are internally compensated with low input offset voltage due to laser trimming at wafer level.
The amplifier feedback resistors are internally connected to VOUT on the AD7847.
The AD7837/AD7847 is fabricated in Linear Compatible CMOS (LC2MOS), an advanced, mixed technology process that combines precision bipolar circuits with low power CMOS logic.
A novel low leakage configuration (U.S. Patent No. 4,590,456) ensures low offset errors over the specified temperature range.