2.5 V to 5.5 V, Parallel Interface Octal Voltage Output 8-Bit D/A Converter
The AD5346/AD5347/AD5348 have a parallel interface. CS selects the device and data is loaded into the input registers on the rising edge of WR. A readback feature allows the internal DAC registers to be read back through the digital port.
The GAIN pin on these devices allows the output range to be set at 0 V to VREF or 0 V to 2 x VREF.
Input data to the DACs is double-buffered, allowing simultaneous update of multiple DACs in a system using the LDAC pin.
An asynchronous CLR input is also provided, which resets the contents of the Input Register and the DAC Register to all zeros. These devices also incorporate a power-on-reset circuit that ensures that the DAC output powers on to 0 V and remains there until valid data is written to the device. All three parts are pin-compatible, which allows the user to select the amount of resolution appropriate for their application without redesigning their circuit board.
- Portable battery-powered instruments
- Digital gain and offset adjustment
- Programmable voltage and current sources
- Optical networking
- Automatic test equipment
- Mobile communications
- Programmable attenuators
- Industrial process control
At least one model within this product family is in production and available for purchase. The product is appropriate for new designs but newer alternatives may exist.
Solutions Bulletins & Brochures
Digital to Analog Converters ICs Solutions Bulletin
Understanding D/A Converter Architectures
The performance of a D/A is determined through a combination of architecture and process ... by James Caffrey, Analog...
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