250 MHz Dual Integrated DCL with Level Setting DACs, per pin PMU, and per Chip VHH
The driver features three active states: data high mode, data low mode, and term mode, as well as an inhibit state. The inhibit state, in conjunction with the integrated dynamic clamp, facili-tates the implementation of a high speed active termination. The ADATE305 supports two output voltage ranges: −2.0 V to +6.0 V and −1.5 V to +6.0 V by adjusting the positive and negative supply voltages.
The ADATE305 can be used as either a dual single-ended drive/ receive channel or a single differential drive/receive channel. Each channel of the ADATE305 features a high speed window comparator per pin for functional testing, as well as a per pin PMU with FV, or FI and MV, or MI functions. All necessary dc levels for DCL functions are generated by on-chip 14-bit DACs. The per pin PMU features an on-chip 16-bit DAC for high accuracy and contains integrated range resistors to minimize external component counts.
The ADATE305 uses a serial bus to program all functional blocks and has an on-board temperature sensor for monitoring the device temperature.
Data Sheet, Rev. 0, 8/08
At least one model within this product family is in production and available for purchase. The product is appropriate for new designs but newer alternatives may exist.
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