14-Bit, 80 MSPS/155 MSPS, 1.8V Dual, Serial Output A/D Converter

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Product Details

The AD9644 is a dual, 14-bit, analog-to-digital converter (ADC) with a high speed serial output interface and sampling speeds of either 80 MSPS or 155 MSPS.

The AD9644 is designed to support communications appli-cations where high performance, combined with low cost, small size, and versatility, is desired. The JESD204A high speed serial interface reduces board routing requirements and lowers pin count requirements for the receiving device.

The dual ADC core features a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth differential sample-and-hold analog input amplifiers that support a variety of user-selectable input ranges. An integrated voltage reference eases design consid-erations. A duty cycle stabilizer is provided to compensate for variations in the ADC clock duty cycle, allowing the converters to maintain excellent performance.

By default, the ADC output data is routed directly to the two external JESD204A serial output ports. These outputs are at CML voltage levels. Two modes are supported such that output coded data is either sent through one data link or two. (L = 1; F = 4 or L = 2; F = 2). Independent synchronization inputs (DSYNC) are provided for each channel.

Flexible power-down options allow significant power savings, when desired.

Programming for setup and control is accomplished using a 3-wire SPI-compatible serial interface.

The AD9644 is available in a 48-lead LFCSP and is specified over the industrial temperature range of −40°C to +85°C.

This product is protected by a U.S. patent.

  • Communications
  • Diversity radio systems
  • Multimode digital receivers (3G and 4G)
  • I/Q demodulation systems
  • Smart antenna systems
  • General-purpose software radios
  • Broadband data applications
  • Ultrasound equipment
Product Highlights
  1. An on-chip PLL allows users to provide a single ADC sampling clock; the PLL multiplies the ADC sampling clock to produce the corresponding data rate clock.
  2. The configurable JESD204A output block supports up to 1.6 Gbps per channel data rate when using a dedicated data link per ADC or 3.2 Gbps data rate when using a single shared data link for both ADCs.
  3. Proprietary differential input that maintains excellent SNR performance for input frequencies up to 250 MHz.
  4. Operation from a single 1.8 V power supply.
  5. Standard serial port interface (SPI) that supports various product features and functions, such as data formatting (offset binary, twos complement, or gray coding), enabling the clock DCS, power-down, test modes, voltage reference mode, and serial output configuration.

Product Lifecycle

recommend Recommended for New Designs

This product has been released to the market. The data sheet contains all final specifications and operating conditions. For new designs, ADI recommends utilization of these products.

Evaluation Kits


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EVAL-AD9644 Circuit Diagram

Product Details

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Product Recommendations

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AD9644 Companion Parts

Recommended Clock Drivers

Recommended Driver Amplifiers

Recommended VGA's

  • For an ultralow distortion, IF dual channel VGA: AD8376.
  • For an independent, dual channel, digitally controlled VGA: AD8372.

Reference Materials

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Design Resources

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ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well.  "Zero defects" for shipped products is always our goal.

AD9644 Material Declaration
PCN-PDN Information Quality And Reliability Symbols and Footprints


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Evaluation Boards Pricing displayed is based on 1-piece.
Pricing displayed is based on 1-piece. The USA list pricing shown is for budgetary use only, shown in United States dollars (FOB USA per unit), and is subject to change. International prices may vary due to local duties, taxes, fees and exchange rates.