12-Bit, 170/210 MSPS 3.3 V A/D Converter
The ADC requires a 3.3 V power supply and a differential ENCODE clock for full performance operation. The digital outputs are TTL/CMOS or LVDS compatible and support either twos complement or offset binary format. Separate output power supply pins support interfacing with 3.3 V or 2.5 V CMOS logic.
Two output buses support demultiplexed data up to 105 MSPS rates in CMOS mode. A data sync input is supported for proper output data port alignment in CMOS mode and a data clock output is available for proper output data timing. In LVDS mode, the chip provides data at the ENCODE clock rate.
Fabricated on an advanced BiCMOS process, the AD9430 is available in a 100-lead surface-mount plastic package (100 e-PAD TQFP) specified over the industrial temperature range (-40°C to +85°C).
- Wireless and Wired Broadband Communications
- Cable Reverse Path
- Communications Test Equipment
- Radar and Satellite Subsystems
- Power Amplifier Linearization
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At least one model within this product family is in production and available for purchase. The product is appropriate for new designs but newer alternatives may exist.
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