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- Capacitance-to-digital converter
New standard in single chip solutions
Interfaces to single or differential floating sensors
Resolution down to 4 aF (that is, up to 21 ENOB)
Accuracy: 4 fF
Linearity: 0.01%
Common-mode (not changing) capacitance up to 17 pF
Full-scale (changing) capacitance range: ±4 pF
Tolerant of parasitic capacitance to ground up to 60 pF
Update rate: 10 Hz to 90 Hz
Simultaneous 50 Hz and 60 Hz rejection at 16 Hz
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- Temperature sensor on-chip
Resolution: 0.1°C, accuracy: ±2°C
- Voltage input channel
- Internal clock oscillator
- 2-wire serial interface (I2C®-compatible)
- Power
2.7 V to 5.25 V single-supply operation
0.7 mA current consumption
- Operating temperature: –40°C to +125°C
- 16-lead TSSOP package
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| Design Tools |
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ADIsimADC -- Web based version
ADIsimADC simulates behavior using many critical specifications of data converters, including offset, gain, sample rate, bandwidth, jitter, latency, both AC and DC linearity. These models provide a way to validate performance of the converter at the system level to determine the applicability of a selected device.
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