AD8330: Low Cost DC to 150 MHz Variable Gain Amplifier
The AD83301 is a wideband variable gain amplifier for applications requiring a fully differential signal path, low noise, well-defined gain, and moderately low distortion, from dc to 150 ...More
AD8330: Low Cost DC to 150 MHz Variable Gain Amplifier
Product Description
The AD83301 is a wideband variable gain amplifier for applications requiring a fully differential signal path, low noise, well-defined gain, and moderately low distortion, from dc to 150 MHz. The input pins can also be driven from a single-ended source. The peak differential input is ±2 V, allowing sine wave operation at 1 V rms with generous headroom. The output pins can drive single-sided loads essentially rail-to-rail. The differential output resistance is 150 Ω. The output swing is a linear function of the voltage applied to the VMAG pin that internally defaults to 0.5 V, providing a peak output of ±2 V. This can be raised to 10 V p-p, limited by the supply voltage.
The basic gain function is linear-in-dB, controlled by the voltage applied to Pin VDBS. The gain ranges from 0 dB to 50 dB for control voltages between 0 V and 1.5 V—a slope of 30 mV/dB. The gain linearity is typically within ±0.1 dB. By changing the logic level on Pin MODE, the gain decreases over the same range, with an opposite slope. A second gain control port is provided at the VMAG pin and allows the user to vary the numeric gain from a factor of 0.03 to 10. All the parameters of the AD8330 have low sensitivities to temperature and supply voltages.
Using VMAG, the basic 0 dB to 50 dB range can be reposi-tioned to any value from 20 dB higher (that is, 20 dB to 70 dB) to at least 30 dB lower (that is, –30 dB to +20 dB) to suit the application, thereby providing an unprecedented gain range of over 100 dB. A unique aspect of the AD8330 is that its bandwidth and pulse response are essentially constant for all gains, over both the basic 50 dB linear-in-dB range, but also when using the linear-in-magnitude function. The exceptional stability of the HF response over the gain range is of particular value in those VGA applications where it is essential to maintain accurate gain law-conformance at high frequencies.
An external capacitor at Pin OFST sets the high-pass corner of an offset reduction loop, whose frequency can be as low as 5 Hz. When this pin is grounded, the signal path becomes dc-coupled. When used to drive an ADC, an external common-mode control voltage at Pin CNTR can be driven to within 0.5 V of either ground or VS to accommodate a wide variety of requirements. By default, the two outputs are positioned at the midpoint of the supply, VS/2. Other features, such as two levels of power-down (fully off and a hibernate mode), further extend the practical value of this excep-tionally versatile VGA.
The AD8330 is available in 16-lead LFCSP and 16-lead QSOP packages and is specified for operation from −40°C to +85°C.
Applications
1 Protected by U.S. Patent No. 5,969,657; other patents pending.
Design Tools
AD8330 Calculator
Calculates gain and output voltages of the AD8330 based on input voltages a...
AD8330 SPICE Macro Model
Features
- Fully differential signal path and also used with single-sided signals
- Inputs from 0.3 mV to 1 V rms, rail-to-rail outputs
- Differential RIN = 1 kΩ; ROUT (each output) ,br>75 Ω
- Automatic offset compensation (optional)
- Linear-in-dB and linear-in-magnitude gain modes 0 dB to 50 dB, for 0 V < VDBS
< 1.5 V (30 mV/dB)
- Inverted gain mode: 50 dB to 0 dB at -30 mV/dB
- x0.03 to x10 nominal gain for
15 mV< VMAG < 5 V - Constant bandwidth: 150 MHz at all gains
- Low noise: 5 nV/√Hz typical at maximum gain
- Low distortion: ≤-62 dBc typ
- Low power: 20 mA typ at VS of 2.7 V - 6 V
- Available in space-saving 3 mm x 3 mm LFCSP package
Diagrams
- Enlarge
- Other Diagrams
- Symbols and Footprints
Functional Block Diagram for AD8330
Low Cost DC to 150 MHz Variable Gain Amplifier
Other Diagrams for AD8330
Low Cost DC to 150 MHz Variable Gain Amplifier
16-Lead LFCSP Pin Configuration
16-Lead QSOP Pin Configuration
Functional Block Diagram for AD8330
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| Part# | Gain Control | -3 dB BW (MHz) | Gain Low End (dB) | Gain High End (dB) | Number of Channels | Spectral Noise (nV/rtHz) | Supply Voltage (V) | Supply Current (max) | Gain Accuracy (dB) | 1 dB Comp Point (dBm) | Package | Price* (1000-4999) |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| AD600 | Analog | 35 | 0 | +40 | 2 | 1.4 | ±5 | 14mA | - | - | - | $16.61 |
| AD602 | Analog | 35 | -10 | +30 | 2 | 1.4 | ±5 | 14mA | - | - | - | $13.36 |
| AD603 | Analog | 90 | -11 | +31 | 1 | 1.4 | ±5 | 20mA | ±0.5 | - | 8-Lead DIP, 8-Lead SOIC | $4.40 |
| AD604 | Analog | 40 | 0 | +48 | 2 | 0.8 | ±5 | 31mA | ±0.3 | 15 | 24-Lead SOIC, 24-Lead SSOP | $16.45 |
| AD605 | Analog | 40 | -14 | +34 | 2 | 1.8 | +5 | 23mA | ±0.2 | 15 | 16-Lead SOIC | $9.91 |
| AD8260 | Digital | 180 | -6 | +24 | 1 | 2.4 | +3.3 | 28mA | +0.25 | - | - | $3.84 |
| AD8320 | Digital | 150 | -10 | +26 | 1 | 53 | +12 | 105mA | ±0.2 | 22.5 | 20-Lead SOIC | - |
| AD8321 | Digital | 120 | -27.4 | +26 | 1 | 20 | +9 | 90mA | ±1 | 19.5 | 20-Lead SOIC | $4.40 |
| AD8322 | Digital | 180 | -12.6 | +29.5 | 1 | 64 | +5 | 113mA | ±2 | 19 | 28-Lead TSSOP | $3.19 |
| AD8323 | Digital | 100 | -26 | +27.5 | 1 | - | +5 | - | - | - | 28-Lead TSSOP | $3.34 |
| AD8324 | Digital | 100 | -25.5 | +33.5 | 1 | 157 | +3.3 | 207mA | ±1 | 21 | 20-Lead LFCSP, 20-Lead QSOP | $1.73 |
| AD8325 | Digital | 100 | -29.5 | +30 | 1 | 56 | +5 | 133mA | ±1 | 18.5 |
