Documentation Errata for ADSP-2106x SHARC User's Manual (Rev 2.1, March 2004)


Chapter:  6 Page: 28
DOC ID: DOC-666
Change
Add the following sentence at the beginning of the last paragraph on the page (When chaining is enabled, DMA transfers are initiated by writing a memory address to the CP register. ...). Add:
Chain pointer register should be cleared first before enabling chaining.

This sentence also should be inserted before the first sentence in the second paragraph on page 9-18 (DMA chaining is enabled on each link port by setting the LxCHEN bit in LCTL. ...).

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Chapter:  9 Page: 67
DOC ID: DOC-713
Change
Because the TCLK and RCLK signals are internally shorted in multi-channel mode, there is no need for external shorting in this mode. Change the text from:
In multichannel mode, the TCLKx pin is always an input and must connect to its corresponding RCLKx pin.

Change to:
In multichannel mode, TCLKx pins are are internally connected to corresponding RCLKx pins.

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Chapter:  10 Page: 34
DOC ID: DOC-650
Change
In the first paragraph on the page, change from:
Each DMA channel has a count register (C) which must be initialized with a word count to be transferred. The count register is decremented after each DMA transfer on that channel; when the count reaches zero,the interrupt for that channel is generated and the channel is automatically disabled.

Change to: (bold text)
Each DMA channel has a count register (C) which must be initialized with a word count to be transferred. The count register is decremented after each DMA transfer on that channel; when the count reaches zero,the interrupt for that channel is generated and the channel is automatically stopped (not disabled).

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Chapter: A Page: 497
DOC ID: DOC-691
Change
Add the following information to the PUSH instruction description as a note:
When a PUSH LOOP instruction is executed, top of the loop address stack is filled with zero. After executing the PUSH LOOP instruction, LADDR must be written with the content which is to be pushed on the loop address stack. A write to the LADDR will update the top of the loop address stack.

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Chapter: E Page: 2
DOC ID: DOC-564
Change
In section E.2.1 (Effect Latency & Read Latency), change the column naming from "Effect Latency" to "Effect Latency (maximum)". This change is required because the effect latency could still be 0 cycles in some cases.

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Chapter: n/a Page: 0
DOC ID: DOC-576
Change
On the back cover, the FAX number for application support in European is incorrect. Use +49-89-76903-157 instead.

Also, the back cover does not provide the IP address of the application support FTP server. Use ftp://137.71.25.69.

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Last Updated: September 08, 2008
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