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MPEG-4 SP/ASP Decoder Library

The ADI MPEG-4 SP/ASP Decoder library for the Blackfin processor is an implementation of an MPEG-4 video decoder, compliant with the INTERNATIONAL STANDARD ISO/IEC14496-2, Information technology — Coding of audio-visual objects — Part 2: Visual, Third edition 2004-06-01.



Features

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Functions

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Performance Metrics

MIPS summary:

Code memory (KB) Data RAM (MB) Output Buffer (MB) Cycles/pel (MIPS)
Average Moving Average Peak
66.56 1.91 2.06 46.6 (429.5) 49.4 (455.3)
  • MIPS measured using a bit rate of 4 Mbps, 30 fps, 640x480 (VGA) image size, ITU-R BT.656 output, PAL format, optimal memory layout, industry standard football clip (available at ftp://vqeg.its.bldrdoc.gov/MM/), Blackfin ADSP-BF533 rev 0.5 processor.
  • Data cache and instruction cache are enabled. The cache is set in "write back" and "small cache" (DCBS=0) mode. Memory DMA is used.
  • "Data RAM" for one instance, includes Stack, Scratch, Instance/State.
  • "Output buffer" indicates the minimum memory (two PAL frames) required in the settings mentioned above.
  • 1 MB = 1024 KiB; 1 KiB = 1024 Bytes.

NOTE: In deriving the "Moving Average Peak" value, an 8 consecutive frames sliding window was used. An average cycle count was measured for each window of frames, and the worst case average cycle from all the sliding window measurements was determined to be the "Moving Average Peak" value.

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Applications

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Requirements

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Availability and Licensing

Each module supports the Analog Devices, Inc. (ADI) Blackfin Processor family and is a licensed product that is available in object code format. Recipients must sign or accept a license agreement with ADI prior to being shipped or downloading the modules identified in the license agreement.

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