Documentation Errata for ADSP-BF504/ADSP-BF504F/ADSPBF506F: Blackfin® Embedded Processor Data Sheet


Chapter:  Page: 19
DOC ID: DOC-1083
Change
In table 9 (SPORTx Receive Configuration 1 Register - SPORTx_RCR1), the RCKFE bit setting is incorrect. This bit should be cleared (=0) because the sampling edge needs to match the drive edge of the ADC.

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Chapter: N/A Page: 29
DOC ID: DOC-1138
Change

Replace table 18 (ADSP-BF50x Static Current - IDD-DEEPSLEEP - mA) with the following updated table (revised data):

ADSP-BF50x Static Current - IDD-DEEPSLEEP (mA)

Tj

1.10v

1.15v

1.20v

1.25v

1.30v

1.35v

1.40v

1.45v

1.50v

-40

0.20

0.23

0.26

0.29

0.31

0.34

0.37

0.40

0.43

-20

0.30

0.34

0.38

0.43

0.47

0.51

0.55

0.59

0.63

0

0.50

0.57

0.63

0.70

0.77

0.83

0.90

0.97

1.03

25

0.90

1.03

1.17

1.30

1.43

1.57

1.70

1.83

1.97

40

1.30

1.50

1.70

1.90

2.10

2.30

2.50

2.70

2.90

55

2.00

2.30

2.60

2.90

3.20

3.50

3.80

4.10

4.40

70

3.00

3.47

3.93

4.40

4.87

5.33

5.80

6.27

6.73

85

4.60

5.23

5.87

6.50

7.13

7.77

8.40

9.03

9.67

100

6.80

7.67

8.53

9.40

10.27

11.13

12.00

12.87

13.73

105

7.80

8.77

9.73

10.70

11.67

12.63

13.60

14.57

15.53

125

12.50

14.00

15.50

17.00

18.50

20.00

21.50

23.00

24.50

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Last Updated: July 23, 2012
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