The ADP5134 combines two high performance buck regulators and two low dropout (LDO) regulators. It is available in a 24-lead 4 mm × 4 mm LFCSP.
The high switching frequency of the buck regulators enables tiny multilayer external components and minimizes the board space. When the MODE pin is set to high, the buck regulators operate in forced pulse-width modulation (PWM) mode. When the MODE pin is set to low, the buck regulators operate in PWM mode when the load is above a predefined threshold. When the load current falls below a predefined threshold, the regulator operates in power save mode (PSM), improving the light load efficiency.
The two buck regulators operate out of phase to reduce the input capacitor requirement. The low quiescent current, low dropout voltage, and wide input voltage range of the ADP5134 LDO regulators extend the battery life of portable devices. The ADP5134 LDO regulators maintain power supply rejection greater than 60 dB for frequencies as high as 10 kHz while operating with a low headroom voltage of 500 mV.
Regulators in the ADP5134 are activated through dedicated enable pins. The default output voltages can be externally set in the adjustable version or factory programmable to a wide range of preset values in the fixed voltage version.
|Title||Content Type||File Type|
|ADP5134: Dual 3 MHz, 1200 mA Buck Regulators and Two 300 mA LDO Regulators With Precision Enable and Power-Good Output Data Sheet (Rev 0, 10/2013) (pdf, 782 kB)||Data Sheets|
|UG-591: Evaluating the ADP5134 Micropower Management Unit (PMU) (pdf, 984 kB)||User Guides|
|Integrated Power Solutions for Altera FPGAs (pdf, 2460 kB)||Solutions Bulletins|
|Glossary of EE Terms||Glossary||HTML|
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