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| Chapter: N/A |
Page: 12 |
| Reference Number: 39473 |
| Change |
In table 4 (Pin Descriptions), in the State During and After Reset column, the state listed for the Flag 3-0 pins needs to change from: Three-state
Change to: Input |
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| Chapter: N/A |
Page: 13 |
| Reference Number: 35262 |
| Change |
In table 4, the "State During and After Reset" column describes the SPICLK and MOSI pins as "Three state with pull up enabled". This info is not completely accurate, because---when in SPI Master boot mode only---these pins are driven during and after reset. Add the following footnote to the "State During and After Reset" entries for these pins: In SPI Master boot mode, the MOSI and SPICLK are driven during reset and after reset. |
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| Chapter: N/A |
Page: 19 |
| Reference Number: 36783 |
| Change |
Add the following to the paragraph in the "Power-Up Sequencing" section: Note that during power-up, a leakage current of approximately 200μA may be observed on the RESET pin. This leakage current results from the weak internal pull-up resistor on this pin being enabled during power-up. |
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