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G.723.1A Voice Codec

ITU-T Recommendation G.723.1A compresses speech at 5.3 or 6.3 kbit/s. The high rate coder uses Multi-pulse Maximum Likelihood Quantization (MP-MLQ) and the low rate coder uses Algebraic-Code-Excited Linear-Prediction (ACELP). The complete International Telecommunications Union (ITU) G.723.1 Version 5.1 specification is implemented, including the Silence Compression Scheme utilizing Voice Activity ...More

G.723.1A Voice Codec

Product Description

ITU-T Recommendation G.723.1A compresses speech at 5.3 or 6.3 kbit/s. The high rate coder uses Multi-pulse Maximum Likelihood Quantization (MP-MLQ) and the low rate coder uses Algebraic-Code-Excited Linear-Prediction (ACELP). The complete International Telecommunications Union (ITU) G.723.1 Version 5.1 specification is implemented, including the Silence Compression Scheme utilizing Voice Activity Detection (VAD), as specified in G.723.1 Annex A. G.723.1A can be used for compression of speech and other audio signals used in multimedia applications at a very low bit rate and can also be used as part of H.324/H.323 or Voice over Network (VoN) applications.

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Features

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Functions

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Performance Metrics

MIPS summary:

  Code RAM (KiB) Data RAM (KiB) Constant Data Tables (KiB) MIPS
BF533 BF548 BF527
Average Peak Average Peak Average Peak
Encoder 31.7 5.5 18.4 10.4 12 10.4 12 10.4 12
Decoder 3.9 0.93 0.97 0.93 0.97 0.93 0.97

  • This table highlights example Blackfin processors and expected MIPS performance when running out of L1 memory. Some processors include additional L2 internal memory (e.g. BF548) which can help reduce MIPS if the code or data are not placed in L1. Similarly, processors with high speed external memory interfaces (32-bit versus 16-bit or DDR versus SDRAM) will also help reduce overall MIPS requirements.
  • MIPS measured using optimal memory layout on Blackfin BF533 processor using CCLK = 532MHz and SCLK = 133MHz.
  • A collection of ITU and non-ITU vectors were tested to provide the highest MIPS measurement.
  • "Data RAM" for one instance, includes Stack, Scratch, Instance, Minimum Input and Output Single Buffers.
  • 1 KiB = 1024 Bytes.

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Applications

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Requirements

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Availability and Licensing

Each module supports the Analog Devices, Inc. (ADI) Blackfin Processor family and is a licensed product that is available in object code format. Recipients must sign a license agreement with ADI prior to being shipped the modules identified in the license agreement.

Contact your ADI Sales Rep to request this code. If you need to find a Sales Rep in your area, please visit the Sales & Distributor Map/Listing.

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