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G.711 Appendix I Voice Codec with PLC

The “G.711 Appendix I Voice Codec with PLC” software library provides a combination of ITU-T G.711 voice codec and G.711 Appendix I packet loss concealment. G.711 is also known as a-law or µ-law encoding and decoding. This module operates at 8 kHz and is fully ITU compliant. It is typically used when communicating with a- and µ-law hardware codecs, in TDM trunks, or in VoIP when operating on ...More

G.711 Appendix I Voice Codec with PLC

Product Description

The “G.711 Appendix I Voice Codec with PLC” software library provides a combination of ITU-T G.711 voice codec and G.711 Appendix I packet loss concealment. G.711 is also known as a-law or µ-law encoding and decoding. This module operates at 8 kHz and is fully ITU compliant. It is typically used when communicating with a- and µ-law hardware codecs, in TDM trunks, or in VoIP when operating on G.711 RTP packets.

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Features

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Functions

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Performance Metrics

MIPS summary:

  Code RAM (KiB) Data RAM (KiB) Constant Data Tables (KiB) MIPS
BF533 BF548 BF527
Encoder 3.35 0.02 0.23 0.09 0.09 0.09
Decoder 2.60 0.14 (1.09 for PLC) 0.13 (1.08 for PLC) 0.13 (1.08 for PLC)
  • This table highlights example Blackfin processors and expected MIPS performance. Some processors include additional L2 internal memory (e.g. BF548) which can help reduce MIPS when fully utilized. Similarly, processors with high speed external memory interfaces (32-bit versus 16-bit or DDR versus SDRAM) will also help reduce overall MIPS requirements.
  • MIPS were measured using optimal memory layout
  • ITU-T reference vector "sweep.src" is used for MIPS measurement
  • The MIPS for PLC is the maximum MIPS when packet loss concealment is executed
  • Both instruction and data cache have been enabled and data cache was set to write-back mode
  • "Data RAM" refers to a single instance and includes stack, scratch and instance/state memory as well as minimum-size input and output single buffers
  • 1 KiB = 1024 Bytes

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Applications

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Requirements

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Availability and Licensing

Each module supports the Analog Devices, Inc. (ADI) Blackfin Processor family and is a licensed product that is available in object code format. Recipients must sign a license agreement with ADI prior to being shipped the modules identified in the license agreement.

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