MIPS summary:
| Code memory (KB) |
Data RAM (KB) |
Data ROM (KB) |
Frame Buffer (MB) |
Cycles/pel (MIPS) |
| Average |
Moving Average Peak |
| 25.35 |
70.88 |
1.03 |
5.26 |
53.2 (552) |
54.97 (570) |
- MIPS measured using sequences where detected objects cover around 30% of the scene, optimal memory layout, NTSC D1 input running on ADSP-BF561 rev 0.5 processor.
- Measurements done with CAS = 3 for SDRAM, CCLK = 600 MHZ, SCLK = 100 MHZ for ADSP-BF561
- Data cache and instruction cache are enabled. The cache is set in "write back" and "small cache" (DCBS=0) mode. Memory DMA is used with 32 bit DMA.
- "Data RAM" for one instance, includes Stack, Scratch, Instance/State.
- "Frame Buffer" for one instance of D1 PAL (720x576) resolution.
- All "Scratch" and "State" Memory are for D1 resolution.
- 1 MB = 1024 KiB; 1 KiB = 1024 Bytes.
NOTE: In deriving the "Moving Average Peak" value, an 8 consecutive frames sliding window was used. An average cycle count was measured for each
window of frames, and the worst case average cycle from all sliding window measurements was determined to be the "Moving Average Peak" value.
