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MPEG-4 AAC-LC DECODER

This library for the Blackfin processor is an implementation of the MPEG-4 AAC-LC (Low Complexity Advanced Audio Coding) decoder, which is conformant to the standard defined by ISO/IEC in MPEG-4 Audio.

The AAC-LC Decoder has been highly optimised to run on the Analog Devices' Blackfin processor family. It is a self-contained software module that is fully complaint with ISO/IEC 14496-3 ...More

MPEG-4 AAC-LC DECODER

Product Description

This library for the Blackfin processor is an implementation of the MPEG-4 AAC-LC (Low Complexity Advanced Audio Coding) decoder, which is conformant to the standard defined by ISO/IEC in MPEG-4 Audio.

The AAC-LC Decoder has been highly optimised to run on the Analog Devices' Blackfin processor family. It is a self-contained software module that is fully complaint with ISO/IEC 14496-3 MPEG-4 specification and rigorously tested and field-proven in commercial application.

It contains a standard C-callable 'push' API with the added flexibility using 'pull' (or 'poll') by adding a light wrapper. The code has been implemented using Instruction and Data cache and has no dependencies on processor peripherals or registers, adding greater system flexibility and ease of use.

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EVALUATION BOARDS & DEVELOPMENT KITS

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TOOLS, SOFTWARE & SIMULATION MODELS

Features


Functions


Performance Metrics

MIPS summary:

Code memory (KiB) Data RAM (KiB) Constant Data Tables (KiB) MIPS
BF533 BF548 BF527
Average Averaged Peak Average Averaged Peak Average Averaged Peak
25.8 47.0 26.8 19.03 19.54 16.98 17.47 18.42 18.89
  • This table highlights example Blackfin processors and expected MIPS performance. Some processors include additional L2 internal memory (e.g. BF548) which can help reduce MIPS when fully utilized. Similarly, processors with high speed external memory interfaces (32-bit versus 16-bit or DDR versus SDRAM) will also help reduce overall MIPS requirements.
  • MIPS measured using typical bit rates 128kpbs, Fs=48kHz, optimal memory layout, worst case test vector, Stereo, module library compiled with Si workarounds for the ADSP-BF5xx family
  • "Data RAM" for one instance, includes Stack, Scratch, Instance/Stage, Minimum Input and Output Single Buffers.
  • 1 KiB = 1024 Bytes.


Applications


Requirements


Availability and Licensing

Each module supports the Analog Devices, Inc. (ADI) Blackfin Processor family and is a licensed product that is available in object code format. Recipients must sign a license agreement with ADI prior to being shipped the modules identified in the license agreement.