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DTS 5.1 Decoder

The DTS® technology, derived from the name Digital Theatre Systems, was initially focused on providing high fidelity, full bandwidth, and multi channel surround sound experience in theatres. The DTS 5.1 encoder efficiently encodes and reduces the demand on storage requirements while maintaining high fidelity multi-channel audio.

With advancing technology, today it has become a ...More

DTS 5.1 Decoder

Product Description

The DTS® technology, derived from the name Digital Theatre Systems, was initially focused on providing high fidelity, full bandwidth, and multi channel surround sound experience in theatres. The DTS 5.1 encoder efficiently encodes and reduces the demand on storage requirements while maintaining high fidelity multi-channel audio.

With advancing technology, today it has become a de-facto for all ranges of consumer products such as DVD players, etc.

The DTS 5.1 decoder implementation has been highly optimised to run on the Analog Devices' Blackfin processor family. It is a self-contained software module that is fully compliant with DTS 5.1 specification and rigorously tested & demonstrated in real time environment. The ADI implementation has been certified by DTS Inc.

It contains a standard C-callable 'push' API with the added flexibility of using 'pull' (or 'poll') by adding light 'wrapper' code. The code has been implemented using Instruction and Data cache and has no dependencies on processor peripherals or registers. The module comes along with a light wrapper API which enables block approach for integration to overall framework. This makes system integration much easier.

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TOOLS, SOFTWARE & SIMULATION MODELS

Features

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Functions

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Performance Metrics

MIPS summary:

Code memory (KiB) Data RAM (KiB) Constant Data Tables (KiB) MIPS
Average Peak
33.8 39 82.15 53.9 55.5
  • MIPS measured using Fs = 48kHz, optimal memory layout, worst case test vector, running on a ADSP-BF533.
  • Code compatible across all BF5xx processors, with silicon anomaly workarounds implemented based on ADSP-BF533 Silicon Revision 0.3 and later, ADSP-BF537 Silicon Revision 0.3 and ADSP-BF561 Silicon Revision 0.4 and later.
  • "Data RAM" for one instance, includes Stack, Scratch, Instance/State, Minimum Input and Output Single Buffers.
  • Input buffer size is 2K bytes and output buffer size is 6K bytes

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Applications

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Requirements

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Availability and Licensing

Each module supports the Analog Devices, Inc. (ADI) Blackfin Processor family and is a licensed product that is available in object code format. Recipients must sign a license agreement with ADI prior to being shipped the modules identified in the license agreement.

Contact your ADI Sales Rep to request this code. If you need to find a Sales Rep in your area, please visit the Sales & Distributor Map/Listing.

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