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James Bryant

When are two chips better than one?

When two chips are tastier work better, cost less, and get you to market faster.

The Belgians who invented chips and still make the best in the World serve them with mayonnaise. I can't imagine why Americans call them "French fries." In Belgium recently discussing (silicon) chips with a Belgian colleague, I had to point out that with integrated circuit chips, as with potato chips, quality is more important than size. More potato chips are good – and this is sometimes true of silicon ones too.

Integration is one of the most powerful forces in our industry – we have Moore's Law to mandate it. Increased integration has provided smaller size, lower cost, and greater power efficiency. This is good but total integration – a whole system on one chip – is not always best.

Nanometer CMOS integrates huge amounts of digital circuitry, but also forces lower supply voltages and a worse signal to noise ratio. If a system needs precision analog circuitry or robust digital interfaces it cannot cope.

We can make chips combining nanometer CMOS with higher voltage devices, bipolar or CMOS, to handle analog and higher voltage digital functions. But such multi-process chips yield less and cost more. Carefully partitioning a system into two or more chips often gives less reject silicon for less cost than one massive chip with relatively poor yield.

Such partitioning takes great skill. The designer must optimize size, cost, power, functionality and time to market. His/her tools are circuit and system design skills and advanced IC processes.

Designing the latest and greatest system on a chip is great, but if you're late to market you might as well skip work and go fishing/shopping. Often the quickest solution uses separate computational and analog/high level digital chips. One way of achieving such a solution quickly is to use an FPGA as the computational chip. While this is rarely the lowest cost or highest density solution, it can prevent a missed opportunity while a cheaper purpose-built, but longer in development, chip takes over later in the product lifecycle.

The analog chip need not be all that simple. Modern analog chips frequently contain powerful digital processing – examples include sigma-delta (S-D) converters and smart interpolating DACs which contain (for example) firmware to separate interleaved QAM input data and digital interpolation to reduce demands on the output anti-aliasing filter.

I'm not proposing to repeal Moore's Law – integration is still good. But often smart partitioning rather than total integration improves your product while letting you get to market ahead of your competition. Then you can celebrate – the Belgians make some of the best beers in the World, too.


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James Bryant holds a degree in Physics and Philosophy from the University of Leeds. He is also C.Eng., Eur. Eng., MIEE, and an FBIS.