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Frequently Asked Question

What happens if I violate the proper logic level of the reference clock (REF CLK), that is, I underdrive or overdrive it?

Overdrive of the REF CLK input(s), may forward bias diodes that are present at the input for ESD protection. These diodes terminate to VCC and GND; therefore forward biasing them will shunt the clock to VCC or GND. Additionally overdriving the RefClk inputs can cause the interl clocking circuit to saturate resulting in erratic opperation. Underdriving the input may cause erratic, or no switching of the Ref Clock circuit.