Product Details

Dolby® Digital EX is an extension of the Dolby Digital decoding algorithm that adds a center rear channel or two back channels to 5.1-channel playback, expanding the surround sound experience to 6.1 channels or 7.1 channels. The signals for the center rear channel or the two back channels are extracted from the left and right surround channels and can be sent to one or two speakers placed behind the listener.

Features

  • Release format: Object code module.
  • Standard C-callable ‘push‘ API with the added flexibility of using ‘pull’ (or ‘poll’) by adding light ‘wrapper’ code.
  • Fully re-entrant and multi-instancing capable.
  • No dependencies on processor peripherals or registers.
  • Highly optimised code compatible across the SHARC processor family ADSP-2136x and ADSP-214xx.
  • Rigorously tested.
  • Dolby certified.
  • Conformance Standard: "Dolby Digital EX", Provisional Draft Version 1.01.
  • Reference Code Revision: Dolby Digital Decoder C Source Code version 7.1.0; Dolby Pro Logic IIx Decoder Simulation Version 2.00.
  • Input format: Raw AC-3 bit stream.
  • Output format: PCM, 32-bit floating-point (range -1, 1), non interleaved, 7 or 8 channels corresponding to 6.1 or 7.1 speaker configurations.
  • Output buffer samples per block: 256.
  • Sample Rate: All sample rates specified by the AC-3 standard: 32, 44.1 and 48 kHz.
  • Bit Rate: All bit rates specified by the AC-3 standard, from 32 to 640 kbps.

System Requirements

  • Windows XP Professional SP3 (32-bit only).
  • Windows Vista Business/Enterprise/Ultimate SP2 (32-bit only). It is recommended to install the software in a non-UAC-protected location.
  • Windows 7 Professional/Enterprise/Ultimate (32 and 64-bit).
  • Minimum of 2 GHz single core processor, 3.3 GHz dual core is recommended.
  • Minimum of 1 GB memory (RAM), 4 GB is recommended.
  • Minimum of 2 GB hard disk (HDD) space is required.
  • CrossCore® Embedded Studio for Analog Devices Processors.

Performance Metrics

MIPS summary:

Processor Code RAM (KiB) Data RAM (KiB) Constant Data Tables (KiB) MIPS
Average Peak
ADSP-21369 68.0 50.5 19.5 50.2 58.2
ADSP-21469 50.1 50.5 19.5 50.7 58.7

  • All figures in the table above refer to one instance of DDEX. “Data RAM” includes stack, scratch, instance state, one single-buffered input buffer containing 960 32-bit words, and seven single-buffered output buffers each containing 256 32-bit samples.
  • MIPS figures indicated in the table have been measured using 48 kHz sampling frequency, 8 output channels (7.1 speaker configuration), optimal memory layout, worst-case input test vectors, and a block size of 256 samples per channel.
  • Heap (or "malloc()") is not used.
  • 1 KiB = 1024 Bytes.

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Availability and Licensing

Each module supports the Analog Devices, Inc. (ADI) Blackfin or SHARC Processor family and is a licensed product that is available in object code format. Recipients must sign or accept a license agreement with ADI prior to being shipped or downloading the modules identified in the license agreement.

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