High Current Driver for the AD2S1210 Resolver-to-Digital Reference Signal Output
Resolver-to-digital converters (RDCs) are widely used in automotive and industrial applications to provide motor shaft position/velocity feedback.
The AD2S1210 is a complete 10-bit to 16-bit resolution tracking RDC, which includes an on-chip programmable sine wave oscillator that provides the excitation for resolvers. Because of harsh operating environments, the AD2S1210 (C and D grade) are specified over the extended industrial temperature range of −40°C to +125°C.
The high current driver shown in Figure 1 amplifies and level shifts the AD2S1210 reference oscillator output so that the interface to the resolver is optimized. The driver is a composite amplifier, which utilizes the dual, low noise, precision AD8662 op amp and a discrete complementary emitter follower output stage. A similar driver stage is used for the complementary excitation output so that a fully differential signal is available to drive the resolver primary winding. The AD8662 is available in a narrow 8-lead SOIC package and an 8-lead MSOP; both are specified over the extended industrial temperature range of −40°C to +125°C.
Figure 1. High Current Buffer for the AD2S1210 RDC Reference Signal Output (Simplified Schematic: All Connections and Decoupling Not Shown)
RDCs are used with rotary sensors in order to detect position and rotation speed of a shaft of a motor. In these applications, a resolver is excited with the sine wave reference signal. The resolver excitation reference signal present on the primary winding is transformed into two sinusoidal, differential output signals: the sine and cosine. Amplitudes of the sine and cosine signals depend on the actual resolver position, transformation ratio of the resolver, and the excitation signal amplitude.
The RDC simultaneously samples both input signals in order to provide digitized data to the digital engine, known as Type II tracking loop. The Type II tracking loop is responsible for the position and velocity calculations. A typical application circuit is shown in Figure 2.
Figure 2. AD2S1210 RDC Typical Application Circuit
Due to resolver input signal requirements, the excitation buffer must provide a single-ended current of up to 200 mA. The buffer circuit shown in Figure 1 also provides gain to the AD2S1210 excitation output signal, as well as current drive capability. This circuit note describes the performance requirements and the recommended excitation buffer topology. A typical resolver has an input resistance in range of 100 Ω to 200 Ω, and the primary coil should be excited with 7 V rms.
The converter accepts input signals in range of 3.15 V p-p ±27%. The frequency range of the AD2S1210 is specified from 2 kHz to 20 kHz. A Type II tracking loop is employed to track the inputs and convert the input sine and cosine information into a digital representation of the input angle and velocity. The maximum tracking rate of the device is specified at 3,125 rps.
At 16-bit resolution, the position output has accuracy error specification of ±5.3 arc min maximum.
The AD2S1210 operates on the 5 V supply, and the output buffer circuit requires a 12 V supply in order to provide the required differential signal amplitude to the resolver.
Figure 1 shows the schematic for the AD2S1210, AD8662 and associated circuitry which includes a push-pull output stage. The push-pull output stage is able to deliver the required power to a resolver. One advantage of this circuit is that there is only a small amount of quiescent current required in the output transistors when there is no signal present.
The excitation output of the AD2S1210 typically delivers a 3.6 V p-p sinusoidal signal on the EXC and EXC outputs. This results in a 7.2 V p-p differential signal.
The typical transformation ratio of an automotive resolver is 0.286. Therefore, if a unity-gain buffer is used in conjunction with the AD2S1210, the amplitude of the resolver outputs will be approximately 2 V p-p differential. Such a signal has insufficient amplitude to meet the AD2S1210 input amplitude specification. Ideally, the sine and cosine inputs should have amplitude of 3.15 V p-p differential; hence, the buffer stage should provide a gain of approximately 1.5.
The gain of the excitation buffer shown in Figure 1 is set by resistors R1 and R2. During the circuit tests, the R1 and R2 resistors had a value of 10 kΩ and 15.4 kΩ, respectively, corresponding to a gain of 1.54.
Resistors R3 and R4 set the common-mode voltage of the amplifier to VCM(2) = +3.75 V. The common-mode voltage of the excitation outputs is VCM(1) = +2.5 V (mid-supply). This translates into the buffer output common-mode voltage of approximately VCM(OUT) = +5.7 V (approximately one-half the +12 V supply).
The 2.2 kΩ resistors supply the bias current for the diodes D1, D2 at the input of the push-pull circuit and establish the quiescent current in this leg. The voltages across D1 and Q1 (VBE) should match, as should D2 and T2 (VBE). The voltages across 3.3 Ω resistor and 4.7 Ω resistor should also match.
The AD8662 op amp was chosen to meet driver requirements for the push-pull output stage. Because resolvers and RDC converters are often used in harsh environments, extended temperature range parts (−40°C to +125°C) are usually required. The op amp should offer bandwidth greater than 2 MHz, with the input offset specification less than 1 mV. Care should be taken to not introduce distortion to the signal near 0 V differential because this distortion may not be filtered out by the resolver itself. This is ensured by setting the bias of the output transistors so that at the zero crossing there is sufficient current to maintain linearity.
Because the selected topology can operate on a single supply, the op amp selected for the buffer should also be able to operate with the single supply rail. The AD8662 operates on a single supply of +5 V to +16 V and has rail-to-rail outputs, making it an ideal choice.
Capacitor C1 in parallel with resistor R2 forms a low pass filter to filter out any noise that may exist on the EXC and EXC outputs. Care should be taken when selecting the cutoff frequency of this filter to ensure that phase shift of the carrier caused by the filter does not exceed the phase lock range of the AD2S1210. It should be noted that the C1 capacitor is not obligatory because the resolver can filter out high frequency components from the AD2S1210 excitation output.
It should be noted that during the circuit verification process the outputs of the resolver were directly connected to the AD2S1210 inputs. Often in customer applications, additional scaling resistors and/or passive RC filters are used. Additional passive components in front of the AD2S1210 device are acceptable; however, care should be taken to not exceed the maximum phase lock range of the AD2S1210 as specified in the data sheet. External passive components may result in amplitude mismatch error between the channels, which is directly translated into position error. For this reason it is recommended that at least 1% tolerance resistors and 5% tolerance capacitors be used in the signal path.
Figure 3 shows 12-bit angular accuracy histogram of codes captured at a 70° angle. A 16-bit angular accuracy histogram of codes is presented in Figure 4. Figure 5 shows the velocity output histogram of codes at the rotation rate of 100 rps at 16-bit resolution setting.
Figure 3. 12-Bit Angular Accuracy Histogram of Codes, 70° Angle, 10,000 Samples
Figure 4. 16-Bit Angular Accuracy Histogram of Codes, 70° Angle, 10,000 Samples
Figure 5. 16-Bit Velocity Output Histogram of Codes,100 rps, 10,000 Samples
As can be seen, evaluation results of the AD2S1210 device used in conjunction with presented excitation buffer circuitry achieve analog accuracy and velocity accuracy specified in the product data sheet.
Values of the components surrounding the AD2S1210 and AD8662 can be modified to meet specific requirements of the application and sensor. For example, by modifying resistor values, the user may scale bias voltage, amplitude, and maximum drive capability on the output of the buffer circuitry
The buffer circuitry in Figure 1 can be used without any modifications with other ADI resolver-to-digital converters, such as the AD2S1200 and AD2S1205. In order to change the output amplitude, drive capability, and offset voltage, the user should adjust passive components appropriately.
EVAL-CED1Z Technical DocumentationThe EVAL-AD2S1210EDZ evaluation board is developed to evaluate and test the AD2S1210 device with the circuitry described in this circuit note. A detailed schematic, bill of materials, and user instructions are available in the EVAL-AD2S1210EDZ Evaluation Board User Guide.
In order to test and evaluate described circuitry the EVAL-AD2S1210EDZ evaluation control board, the EVAL-CED1Z evaluation controller board, a resolver, and PC (Windows™ 2000™ or Windows™ XP™) with USB interface are required. In some cases the resolver can be replaced by resolver synchro standard, which is used to simulate function of the real sensor. A suitable resolver simulator is the North Atlantic Model 5300.
The software installation procedure for the EVAL-AD2S1210 board and the EVAL-CED1Z board is described in the EVAL-AD2S1210EDZ Evaluation Board User Guide. Details of the operation of the EVAL-CED1Z board can be found in EVAL-CED1Z Converter Evaluation and Development Platform and EVAL-CED1Z Technical Documentation.
Setup and Test
Details regarding the testing of the AD2S1210 can be found in the EVAL-AD2S1210EDZ Evaluation Board User Guide.