MPEG-4 AAC-LC Decoder, Blackfin
The MPEG-4 AAC-LC decoder library for the Blackfin processor implements the MPEG-4 AAC-LC (Low Complexity Advanced Audio Coding) decoder, which is conformant to the standard defined by ISO/IEC in MPEG-4 Audio.
- Transport Stream: External parsing for ADTS, ADIF, and MP4 file format. Parsers are supplied by ADI
- Output Status: Sample rate, number of output channels, etc.
- Fast Forward / Rewind: Resynchronization function provided to allow the user to seek to and continue playback from random access points
- Extended Test Vector Testing: Compliant with ISO/IEC test vectors and additional test vectors with unusual content
- Error Codes: Reports up to 9 unique error codes, such as input buffer underflow and non-supported streams
- Conformance Standard: ISO/IEC 14496-3 (MPEG-4) AAC Profile at Level 2
- Reference Code Revision: ISO/IEC 14496-5:2001, March 2006
- Framework dependencies: None
- Release format: Object code module with C source wrapper
- Input format: Supports streams with MPEG-2 AAC-LC profile (ISO/IEC 13818-7) and MPEG-4 AAC-LC audio object (ISO/IEC 14496-3: 2005)
- Bit Rate: All bit rates specified by standard
- Output format: Supports mono and two channels (Stereo) 16-bit PCM with configurable output buffer location and stride (interleaved LR samples or separate L/R buffers)
- Output buffer samples per block: 1024 samples
- Sample Rate: All sample frequencies (up to 96 kHz) specified by the standard ISO/IEC 14496-3
- Multi-channel: Fully re-entrant and multi-instancing capable
The AAC-LC Decoder has been highly optimised to run on the Analog Devices' Blackfin processor family. It is a self-contained software module that is fully complaint with ISO/IEC 14496-3 MPEG-4 specification and rigorously tested and field-proven in commercial application.
It contains a standard C-callable 'push' API with the added flexibility using 'pull' (or 'poll') by adding a light wrapper. The code has been implemented using Instruction and Data cache and has no dependencies on processor peripherals or registers, adding greater system flexibility and ease of use.
Each module supports the Analog Devices, Inc. (ADI) Blackfin or SHARC Processor family and is a licensed product that is available in object code format. Recipients must sign or accept a license agreement with ADI prior to being shipped or downloading the modules identified in the license agreement.
|Code memory (KiB)||Data RAM (KiB)
||Constant Data Tables (KiB)
||Averaged Peak||Average||Averaged Peak
- This table highlights example Blackfin processors and expected MIPS performance. Some processors include additional L2 internal memory (e.g. BF548) which can help reduce MIPS when fully utilized.
- Similarly, processors with high speed external memory interfaces (32-bit versus 16-bit or DDR versus SDRAM) will also help reduce overall MIPS requirements.
- MIPS measured using typical bit rates 128kpbs, Fs=48kHz, optimal memory layout, worst case test vector, Stereo, module library compiled with Si workarounds for the ADSP-BF5xx family
- "Data RAM" for one instance, includes Stack, Scratch, Instance/Stage, Minimum Input and Output Single Buffers.
- 1 KiB = 1024 Bytes.
- Windows XP Professional SP3 (32-bit only).
- Windows Vista Business/Enterprise/Ultimate SP2 (32-bit only). It is recommended to install the software in a non-UAC-protected location.
- Windows 7 Professional/Enterprise/Ultimate (32 and 64-bit). It is recommended to install the software in a non-UAC-protected location.
- Minimum of 2 GHz single core processor, 3.3 GHz dual core is recommended.
- Minimum of 1 GB memory (RAM), 4 GB is recommended.
- Minimum of 2 GB hard disk (HDD) space is required.