Application Notes (2)
- AN-877: Interfacing to High Speed ADCs via SPI (pdf, 1594 kB)
AN-586: LVDS Outputs for High Speed A/D Converters
(pdf, 207 kB)
High Speed ADCs Uses LVDS (Low-Voltage Differential Signaling) to Minimize Performance Limitations In ADC Applications When Providing High Speed Data Output
Technical Articles (1)
- JESD204B Survival Guide (pdf)
Design Handbooks (1)
- Optimizing Data Converter Interfaces (pdf, 1677 kB)
FPGA HDL (1)
- MT-019: DAC Interface Fundamentals (pdf, 345 kB)
- MT-097: Dealing with High Speed Logic (pdf, 120 kB)
- MT-201: Interfacing FPGAs to an ADC Converter's Digital Data Output (pdf, 564 kB)
A Look at the JESD204B Serial Interface EYE Diagram
This video will provide viewers an introduction to EYE diagram measurement in JESD204B interfaces.
Fundamentals of Designing with Analog to Digital Converters
BACK BY POPULAR DEMAND: an update to The Fundamentals of the Analog to Digital Converter (ADC) webcast, including basic ADC architectures, understanding ADC errors, how to read an ADC data sheet, and how to choose the right ADC. Includes the latest on ADC products and technology.
Demystifying the JESD204B High-speed Data Converter-to-FPGA interface
This webcast will provide an overview of the JESD204 standard from its original version up to the current "B" revision. In addition, common "high-performance metrics" that are associated with high speed serial interfaces such as JESD204 will be described. Topics covered in this webcast will also be useful for applications that use similar high speed serial interfaces.
Analog Dialogue (1)