
...providing clean clock generation and distribution with
sub-picosecond jitter performance
More Information is available:
Family Features
AD9513, AD9514, AD9515
AD9510, AD9511, AD9512
Applications
Clock Distribution:
Clock Generation:
| Part No. | Output Clocks (MHz) | # Outputs and Logic Family | Wideband Random Jitter (rms fs) | Description |
| CLOCK DISTRIBUTION - Programmable Dividers (1-32), Phase Offset, Adjustable Delay Blocks | ||||
|---|---|---|---|---|
| AD9510 | 1200/800/250 | 4 LVPECL 4 LVDS/CMOS |
250 Additive | 1.6GHz PLL, 8-channel clock distribution |
| AD9511 | 1200/800/250 | 3 LVPECL 2LVDS/CMOS |
250 Additive | 1.6GHz PLL, 5-channel clock distribution |
| AD9512 | 1200/800/250 | 3 LVPECL 2LVDS/CMOS |
250 Additive | 5-channel clock distribution |
| AD9513 | 800/250 | 3 LVDS/CMOS | 300 Additive | 3-channel clock distribution |
| AD9514 | 1600/800/250 | 2 LVPECL 1 LVDS/CMOS |
225 Additive | 3-channel clock distribution |
| AD9515 | 1600/800/250 | 1 LVPECL 1 LVDS/CMOS |
225 Additive | 2-channel clock distribution |
| CLOCK GENERATION - Programmable Clock Rates and Edge Delay | ||||
| AD9540 | 655 | 1 CML, PECL-Compliant | 700 Total | 655 MHz Low Jitter Clock Generator |
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