CN0082: Creating a Constant Envelope Signal Using the ADL5331 RFVGA and AD8319 Log Detector

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OVERVIEW

Circuit Note PDF, 11/2010 (pdf, 263 kB)
Benefits & Features
  • Constant Envelope Signal
  • Automatic Gain Control Loop
  • Optimized for Temperature Stability
Products Used
    Applications: 
  • Communications
  • Communications
Design Resources
Device Drivers
Software, such as C code and/or FPGA code, used to communicate with a component's digital interface.

CIRCUIT FUNCTION AND BENEFITS

Overall performance of a transmitter, wired or wireless, is a strong function of the output power of the amplifier. If the signal is weak, bit error rate (BER) or modulation error rate (MER) will degrade due to low SNR. If the signal is too strong, distortion will cause the same issues. This circuit uses the ADL5331 VGA, the AD8319 power detector, and the AD5621 low power nanoDAC to generate output power control accurate to 12 bits. The AD8319 has very high temperature stability to compensate for any gain variation over temperature of the VGA, resulting in very accurate power control over a wide temperature range. Because the AD8319 control input VSET and the output VOUT are related to the RF input on a volts/dB scale and the AD5621 nanoDAC has a linear transfer function, the resulting output power control will be a linear-in-dB vs. DAC input code.

Figure 1. ADL5331 Operating in an Automatic Gain Control Loop in Combination with the AD8319 and AD5621 (Simplified Schematic)

CIRCUIT DESCRIPTION

The ADL5331 variable gain amplifier provides accurate gain control. However, more precise regulation of output power is achieved with an automatic gain control (AGC) loop. Figure 1 shows the ADL5331 operating in an AGC loop. The addition of the AD8319 log amp allows the AGC to have improved temperature stability over a wide output power control range.

To operate the ADL5331 VGA in an AGC loop, a sample of the output RF is back to the detector (typically using a directional coupler and additional attenuation). A setpoint voltage is applied by the AD5621 DAC to the VSET input of the detector while VOUT is connected to the GAIN pin of the ADL5331. Based on the detector’s defined linear-in-dB relationship between VOUT and the RF input signal, the detector adjusts the voltage on the GAIN pin (the detector’s VOUT pin is an error amplifier output) until the level at the RF input corresponds to the applied setpoint voltage. GAIN settles to a value that results in the correct balance between the input signal level at the detector and the setpoint voltage.

The basic connections for operating the ADL5331 in an AGC loop with the AD8319 are shown in Figure 1. The AD8319 is a 1 MHz to 10 GHz precision demodulating logarithmic amplifier. It offers a detection range of 45 dB with ±0.5 dB temperature stability. The VOUT pin of the AD8319 controls the GAIN (gain control) pin of the ADL5331. When the AD8319 is in controller mode, as it is in this application, VOUT on the AD8319 can drive the ADL5331 GAIN pin over its full linear range of 0 V to 1.4 V. Under very low power RF in conditions, outside the linear control range of the loop, VOUT on the AD8319 may be driven to its maximum value very close to VPOS. To avoid overdrive recovery issues with the ADL5331 GAIN input, a voltage divider can be placed between VOUT on the AD8319 and GAIN on the ADL5331. This may have a slight effect on the overall speed of the loop, for instance, when the input power to the ADL5331 is stepped.

A coupler/attenuation of 23 dB is used to match the desired output power range from the VGA to the linear operating range of the AD8319. In this case, the desired output power range of the VGA is −15 dBm to +15 dBm. With the given attenuator/coupler, the range of power to the AD8319 RF input is −8 dBm to −38 dBm, within the specified range of −3 dBm to −43dBm for a ±1 dB error.

The detector’s error amplifier uses CLFP, a ground-referenced capacitor pin, to integrate the error signal (in the form of a current). A capacitor must be connected to CLFP to set the loop bandwidth and to ensure loop stability.

Figure 2, Figure 3, and Figure 4 show the transfer function of the ADL5331 output power vs. the AD5621 DAC code for a 100 MHz sine wave with an input power of 0 dBm, −10 dBm, and −20 dBm. Note that the power control of the AD8319 has a negative sense. Decreasing the DAC code, which corresponds to demanding a higher signal from the ADL5331, tends to increase GAIN.

Figure 2. ADL5331 Power Out vs. AD5621 DAC Code with RF Input Signal = 0 dBm
Figure 3. ADL5331 Power Out vs. AD5621 DAC Code with RF Input Signal = −10 dBm
Figure 4. ADL5331 Power Out vs. AD5621 DAC Code with RF Input Signal = −20 dBm

In order for the AGC loop to remain in equilibrium, the AD8319 must track the envelope of the ADL5331 output signal and provide the necessary voltage levels to the ADL5331’s gain control input. Figure 5 shows an oscilloscope screenshot of the AGC loop in Figure 1. A 100 MHz sine wave with 50% AM modulation is applied to the ADL5331. The output signal from the ADL5331 is a constant envelope sine wave with amplitude corresponding to a setpoint voltage at the AD8319 of 1.5 V. Also shown is the gain control response of the AD8319 to the changing input envelope.

Figure 5. Oscilloscope Screenshot Showing an AM Modulated Input Signal

Figure 6 shows the response of the AGC RF output to a pulse on VSET. As VSET decreases to 1 V, the AGC loop responds with an RF burst. Response time and the amount of signal integration are controlled by the capacitance at the AD8319 CLFP pin—a function analogous to the feedback capacitor around an integrating amplifier. An increase in the capacitance results in a slower response time.

Figure 6. Oscilloscope Screenshot Showing the ADL5331 Output

The circuit must be constructed on a multilayer PC board with a large area ground plane. Proper layout, grounding, and decoupling techniques must be used to achieve optimum performance (see Tutorial MT-031 and Tutorial MT-101 and the ADL5331and AD8319 evaluation board layouts).

On the underside of the ADL5331 and AD8319 chip scale packages, there is an exposed compressed paddle. This paddle is internally connected to the chip’s ground. Solder the paddle to the low impedance ground plane on the printed circuit board to ensure the specified electrical performance and to provide thermal relief. It is also recommended that the ground planes on all layers under the paddle be stitched together with vias to reduce thermal impedance.

COMMON VARIATIONS

This circuit can be used to implement a constant power out function (fixed setpoint with variable input power) or a variable power out function (variable setpoint with fixed or variable input power). If a higher output power control range is desired, the AD8318 log amp (60 dB power detection range) can be used in place of the AD8319. For a constant output power function, the lower dynamic range of the AD8319 will be adequate since the loop will always servo the detector’s input power to a constant level.

The ADL5331 VGA, which is optimized for transmit applications, can also be replaced by the AD8368 VGA. The AD8368 is optimized for low frequency receive applications up to 800 MHz and provides 34 dB of linear-in-dB voltage-controlled variable gain.

SAMPLE PRODUCTS USED IN THIS CIRCUIT

Product Description Available Product Models to Sample
AD5621 2.7 V to 5.5 V, <100 µA, 12-Bit nanoDAC®, SPI Interface in LFCSP and SC70 AD5621BKSZ-500RL7 AD5621AKSZ-500RL7 AD5621ACPZ-RL7 AD5621AKSZ-REEL7
AD8319 1 MHz TO 10 GHz, 40 dB Log Detector / Controller AD8319ACPZ-R7
ADL5331 1 MHz to 1.2 GHz VGA with 30 dB Gain Control Range ADL5331ACPZ-R7
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